SLYS056A August   2024  – September 2024 TMAG5233

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Magnetic Characteristics
    7. 6.7 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 SOT-23 Magnetic Flux Density Direction
      2. 7.3.2 Output Type
      3. 7.3.3 Timing
      4. 7.3.4 Hall Element Location
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Nomenclature
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Timing

Figure 7-8 displays the start-up behavior of the TMAG5233 and some examples of the output pin voltage based on different magnetic flux density scenarios. When the minimum value for VCC is reached, the TMAG5233 takes time (tON ) to power up, measure the first magnetic sample, and set the output value. When the output value is set, the output is latched and the device enters a low power sleep state. After each tS time has passed, the device measures a new sample and updates the output if necessary. If the magnetic field does not change between periods, the output also does not change.

TMAG5233 Timing and Output Diagram Figure 7-8 Timing and Output Diagram