JAJSNP8B
March 2023 – August 2024
TMAG6181-Q1
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Magnetic Characteristics
5.7
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Magnetic Flux Direction
6.3.2
Sensors Location and Placement Tolerances
6.3.3
Magnetic Response
6.3.4
Parameters Definition
6.3.4.1
AMR Output Parameters
6.3.4.2
Transient Parameters
6.3.4.2.1
Power-On Time
6.3.4.3
Hall Sensor Parameters
6.3.4.4
Angle Accuracy Parameters
6.3.5
Automatic Gain Control (AGC)
6.3.6
Turns Counter
6.3.6.1
Rotation Tracking
6.3.7
Safety and Diagnostics
6.3.7.1
Device Level Checks
6.3.7.2
System Level Checks
6.4
Device Functional Modes
6.4.1
Operating Modes
6.4.1.1
Active Mode
6.4.1.2
Active-Turns Mode
6.4.1.3
Low-Power Mode
6.4.1.4
Sleep Mode
6.4.1.5
Fault Mode
7
Application and Implementation
7.1
Application Information
7.1.1
Power Supply as the Reference for External ADC
7.1.2
AMR Output Dependence on Airgap Distance
7.1.3
Calibration of Sensor Errors
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.2.1
Designing with Multiple Sensors
7.2.2.1.1
Designing for Redundancy
7.2.2.1.2
Multiplexing Multiple Sensors
7.2.3
Application Curve
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
8
Device and Documentation Support
8.1
ドキュメントの更新通知を受け取る方法
8.2
サポート・リソース
8.3
Trademarks
8.4
静電気放電に関する注意事項
8.5
用語集
9
Revision History
10
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DGK|8
MPDS028E
サーマルパッド・メカニカル・データ
発注情報
jajsnp8b_oa
jajsnp8b_pm
6.3.7.1
Device Level Checks
AMR signal path checks
AMR sensor bias check
AMR output signals common mode check
Automatic gain control loop check
Hall sensor signal path checks
Hall sensor bias and resistance check
Hall sensor comparator check
Turns counter overflow check
Power management and supporting circuitry checks
Internal LDO undervoltage check
Internal clocks integrity check
Internal memory integrity check (or a cyclic redundancy check–CRC)