JAJSPB7A February 2024 – July 2024 TMP110
PRODUCTION DATA
The TMP110 has a standard bidirectional I2C interface that is controlled by a controller device in order to be configured or read the status of TMP110 device. Each target device on the I2C bus has a specific device address to differentiate between other target devices that are on the same I2C bus. Many target devices require configuration upon start-up to set the behavior of the device. This is typically done when the controller accesses internal register map of the target, which have unique register pointer. A device can have one or multiple registers where data is stored, written, or read. The TMP110 includes 50ns glitch suppression filters, allowing the device to coexist on an I3C mixed bus. The TMP110 supports transmission data rates up to 1MHz.