Figure 8-5 Layout Example (SOT563-6 package)

There are special considerations that need to be taken for the TMP112 X2SON package. These considerations are due to the center pad being electrically connected to either address or alert (depending on the orderables shown in Address and Alert Variant Device Target Address) and because of the dimensions of the package and the pads. With the address option, the center pad can be directly connected with a trace on the same layer to one of the 4 edge pins for setting the device address as shown in Figure 8-6.

Figure 8-6 ADD0 Pin Layout Example (X2SON-5 package)

When using the ALERT pin of the device, a 4 mil trace can be routed between pins 1 and 5 or pins 2 and 4. This signal can be either routed out in between the pads or on a different layer using a via within the center pad as shown in Figure 8-7. Both of these methods have constraints that must be considered as explained below. Ultimately, choosing one of these methods depends on the specifications of the board manufacturing process:

• Option 1 (Routing in between pads): introduces trace clearance and trace width limitations. As the maximum space between pads is 0.26 mm (10.2 mil), assuming a trace width of 0.1 mm (4 mil) limits the minimum clearance to 0.08 mm (3.15 mil).
• Option 2 (Routing on a different layer using a via): has specific benefits to the user application. For instance, minimum trace clearance and trace width are higher but require a via on the center pad with specific dimensions. The via diameter must be less than 0.305 mm (13.78 mil) to keep the via smaller than the center pad and a minimum drill diameter of 0.1 mm (4 mil) can be assumed to avoid manufacturing issues. With this scenario, a minimum annular ring width specification of 0.125mm (5 mil) is required: Anullar Ring Width (mm) = (0.305-0.1)/2.

Figure 8-7 ALERT Pin Layout Example (X2SON-5 package).