JAJS009M January 2004 – December 2020 TMP175 , TMP75
PRODUCTION DATA
Figure 7-6 shows the internal register structure of the TMP175 and TMP75. The 8-bit Pointer register of the devices is used to address a given data register. The Pointer register uses the two LSBs to identify which of the data registers must respond to a read or write command. Table 7-4 identifies the bits of the Pointer register byte. Table 7-5 describes the pointer address of the registers available in the TMP175 and TMP75. Power-up reset value of P1/P0 is 00.