JAJSOO3B October 2014 – October 2024 TMP75B-Q1
PRODUCTION DATA
To communicate with the TMP75B-Q1, the controller must first communicate with target devices using a target address byte. The target address byte consists of seven address bits, and a direction bit indicating the intent of executing either a read or write operation. The TMP75B-Q1 features three address pins that allow up to eight devices to be addressed on a single bus. The TMP75B-Q1 latches the status of the address pins at the start of a communication. Table 7-2 describes the pin logic levels and the corresponding address values.
DEVICE TWO-WIRE ADDRESS | A2 | A1 | A0 |
---|---|---|---|
1001000 | GND | GND | GND |
1001001 | GND | GND | VS |
1001010 | GND | VS | GND |
1001011 | GND | VS | VS |
1001100 | VS | GND | GND |
1001101 | VS | GND | VS |
1001110 | VS | VS | GND |
1001111 | VS | VS | VS |