JAJSNM5A December 2021 – August 2022 TMP9R00-SP
PRODUCTION DATA
Figure 7-8 shows the internal register structure of the TMP9R00-SP device. The 8-bit pointer register addresses a given data register. The pointer register identifies which of the data registers must respond to a read or write command on the two-wire bus. This register is set with every write command. A write command must be issued to set the proper value in the pointer register before executing a read command. Table 7-3 describes the pointer register and the internal structure of the TMP9R00-SP registers. The power-on-reset (POR) value of the pointer register is 00h (0000 0000b). Table 7-3 lists a summary of the pointer values for the different registers. Writing data to unassigned pointer values are ignored and does not affect the operation of the device. Reading an unassigned register returns undefined data and is ACKed.