SPRS565D April 2009 – June 2014 TMS320C6743
PRODUCTION DATA.
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
SIGNAL NAME | PIN NO | TYPE(1) | PULL(2) | MUXED | DESCRIPTION | |
---|---|---|---|---|---|---|
PTP | ZKB | |||||
McASP0 | ||||||
EMA_OE/AXR0[13]/GP2[7] | 22 | R7 | I/O | IPU | EMIFA, GPIO | McASP0 serial data |
EMA_WE/AXR0[12]/GP2[3]/BOOT[14] | 55 | M13 | I/O | IPU | EMIFA, GPIO, BOOT | |
AXR0[11]/GP3[11] | 124 | A5 | I/O | IPD | GPIO | |
AXR0[10]/GP3[10] | 123 | D6 | I/O | IPD | GPIO | |
AXR0[9]/GP3[9] | 122 | C6 | I/O | IPD | GPIO | |
AXR0[8]/MDIO_D/GP3[8] | 121 | B6 | I/O | IPU | MDIO, GPIO | |
AXR0[7]/MDIO_CLK/GP3[7] | 120 | A6 | I/O | IPD | ||
AXR0[6]/RMII_RXER/GP3[6] | 118 | D7 | I/O | IPD | EMAC, GPIO | |
AXR0[5]/RMII_RXD[1]/GP3[5] | 117 | C7 | I/O | IPD | ||
AXR0[4]/RMII_RXD[0]/GP3[4] | 116 | B7 | I/O | IPD | ||
AXR0[3]/RMII_CRS_DV/GP3[3] | 115 | A7 | I/O | IPD | ||
AXR0[2]/RMII_TXEN/GP3[2] | 113 | D8 | I/O | IPD | ||
AXR0[1]/RMII_TXD[1]/GP3[1] | 112 | C8 | I/O | IPD | ||
AXR0[0]/RMII_TXD[0]/GP3[0] | 111 | B8 | I/O | IPD | ||
AHCLKX0/GP2[11] | 125 | B5 | I/O | IPD | GPIO | McASP0 transmit master clock |
ACLKX0/ECAP0/APWM0/GP2[12] | 126 | C5 | I/O | IPD | eCAP0, GPIO | McASP0 transmit bit clock |
AFSX0/GP2[13]/BOOT[10] | 127 | D5 | I/O | IPD | GPIO, BOOT | McASP0 transmit frame sync |
AHCLKR0/RMII_MHZ_50_CLK/GP2[14]/BOOT[11] | 129 | A4 | I/O | IPD | EMAC, GPIO, BOOT | McASP0 receive master clock |
ACLKR0/ECAP1/APWM1/GP2[15] | 130 | B4 | I/O | IPD | eCAP1, GPIO | McASP0 receive bit clock |
AFSR0/GP3[12] | 131 | C4 | I/O | IPD | GPIO | McASP0 receive frame sync |
McASP1 | ||||||
AXR1[8]/EPWM1A/GP4[8] | 168 | M2 | I/O | IPD | eHRPWM1 A, GPIO | McASP1 serial data |
AXR1[7]/EPWM1B/GP4[7] | 169 | M3 | I/O | IPD | eHRPWM1 B, GPIO | |
AXR1[6]/EPWM2A/GP4[6] | 170 | M4 | I/O | IPD | eHRPWM2 A, GPIO | |
AXR1[5]/EPWM2B/GP4[5] | 171 | N1 | I/O | IPD | eHRPWM2 B, GPIO | |
AXR1[4]/EQEP1B/GP4[4] | 173 | N2 | I/O | IPD | eQEP, GPIO | |
AXR1[3]/EQEP1A/GP4[3] | 174 | P1 | I/O | IPD | ||
AXR1[2]/GP4[2] | 175 | P2 | I/O | IPD | GPIO | |
AXR1[1]/GP4[1] | 176 | R2 | I/O | IPD | ||
AXR1[0]/GP4[0] | 1 | T3 | I/O | IPD | ||
AHCLKX1/EPWM0B/GP3[14] | 160 | K2 | I/O | IPD | eHRPWM0, GPIO | McASP1 transmit master clock |
ACLKX1/EPWM0A/GP3[15] | 162 | K3 | I/O | IPD | eHRPWM0, GPIO | McASP1 transmit bit clock |
AFSX1/EPWMSYNCI/EPWMSYNCO/GP4[10] | 163 | K4 | I/O | IPD | eHRPWM0, GPIO | McASP1 transmit frame sync |
AHCLKR1/GP4[11] | - | L1 | I/O | IPD | GPIO | McASP1 receive master clock |
ACLKR1/ECAP2/APWM2/GP4[12] | 165 | L2 | I/O | IPD | eCAP2, GPIO | McASP1 receive bit clock |
AFSR1/GP4[13] | 166 | L3 | I/O | IPD | GPIO | McASP1 receive frame sync |
AMUTE1/EPWMTZ/GP4[14] | 132 | D4 | O | IPD | eHRPWM0, eHRPWM1, GPIO, eHRPWM2 | McASP1 mute output |