SPRS565D April 2009 – June 2014 TMS320C6743
PRODUCTION DATA.
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The device includes two PSC modules.
Each PSC module controls clock states for several on the on chip modules, controllers and interconnect components. Table 6-78 and Table 6-79 lists the set of peripherals/modules that are controlled by the PSC, the power domain they are associated with, the LPSC assignment and the default (power-on reset) module states. The module states and terminology are defined in Section 6.24.2.2.
LPSC NUMBER | MODULE NAME | POWER DOMAIN | DEFAULT MODULE STATE | AUTO SLEEP/WAKE ONLY |
---|---|---|---|---|
0 | EDMA3 Channel Controller | AlwaysON (PD0) | SwRstDisable | — |
1 | EDMA3 Transfer Controller 0 | AlwaysON (PD0) | SwRstDisable | — |
2 | EDMA3 Transfer Controller 1 | AlwaysON (PD0) | SwRstDisable | — |
3 | EMIFA (BR7) | AlwaysON (PD0) | SwRstDisable | — |
4 | SPI 0 | AlwaysON (PD0) | SwRstDisable | — |
5 | MMC/SD 0 | AlwaysON (PD0) | SwRstDisable | — |
8 | — | — | — | — |
9 | UART 0 | AlwaysON (PD0) | SwRstDisable | — |
10 | SCR0
(Br 0, Br 1, Br 2, Br 8) |
AlwaysON (PD0) | Enable | Yes |
11 | SCR1
(Br 4) |
AlwaysON (PD0) | Enable | Yes |
12 | SCR2
(Br 3, Br 5, Br 6) |
AlwaysON (PD0) | Enable | Yes |
13 | PRUSS | AlwaysON (PD0) | SwRstDisable- | — |
15 | DSP | PD_DSP (PD1) | Enable | — |
LPSC NUMBER | MODULE NAME | POWER DOMAIN | DEFAULT MODULE STATE | AUTO SLEEP/WAKE ONLY |
---|---|---|---|---|
0-2 | — | — | — | — |
3 | GPIO | AlwaysON (PD0) | SwRstDisable | — |
4 | — | — | — | — |
5 | EMAC | AlwaysON (PD0) | SwRstDisable | — |
6 | EMIFB (Br 20) | AlwaysON (PD0) | SwRstDisable | — |
7 | McASP0 ( + McASP0 FIFO) | AlwaysON (PD0) | SwRstDisable | — |
8 | McASP1 ( + McASP1 FIFO) | AlwaysON (PD0) | SwRstDisable | — |
9-10 | — | — | — | — |
11 | I2C 1 | AlwaysON (PD0) | SwRstDisable | — |
12 | — | — | — | — |
13 | UART 2 | AlwaysON (PD0) | SwRstDisable | — |
14-16 | — | — | — | — |
17 | eHRPWM0/1/2 | AlwaysON (PD0) | SwRstDisable | — |
18-19 | — | — | — | — |
20 | ECAP0/1/2 | AlwaysON (PD0) | SwRstDisable | — |
21 | EQEP0/1 | AlwaysON (PD0) | SwRstDisable | — |
22-23 | — | — | — | — |
24 | SCR8
(Br 15) |
AlwaysON (PD0) | Enable | Yes |
25 | SCR7
(Br 12) |
AlwaysON (PD0) | Enable | Yes |
26 | SCR12
(Br 18) |
AlwaysON (PD0) | Enable | Yes |
27-31 | — | — | — | — |