JAJSGF4F November 2012 – September 2021 TMS320F28050 , TMS320F28051 , TMS320F28052 , TMS320F28052F , TMS320F28052M , TMS320F28053 , TMS320F28054 , TMS320F28054F , TMS320F28054M , TMS320F28055
PRODUCTION DATA
The device segregates peripherals into four sections. The mapping of peripherals is as follows:
| PF0: | PIE: | PIE Interrupt Enable and Control Registers Plus PIE Vector Table | |
| Flash: | Flash Waitstate Registers | ||
| Timers: | CPU-Timers 0, 1, 2 Registers | ||
| DCSM: | Dual Zone Security Module Registers | ||
| ADC: | ADC Result Registers | ||
| CLA | CLA Registers and Message RAMs | ||
| PF1: | GPIO: | GPIO MUX Configuration and Control Registers | |
| eCAN: | eCAN Configuration and Control Registers | ||
| eCAP: | eCAP Module and Registers | ||
| eQEP: | eQEP Module and Registers | ||
| PF2: | SYS: | System Control Registers | |
| SCI: | SCI Control and RX/TX Registers | ||
| SPI: | SPI Control and RX/TX Registers | ||
| ADC: | ADC Status, Control, and Configuration Registers | ||
| I2C: | I2C Module and Registers | ||
| XINT: | External Interrupt Registers | ||
| PF3: | ePWM: | ePWM Module and Registers | |
| AFE: | Comparator Modules, Digital Filters, and PGA Control Registers | ||
| eCAP: | eCAP Module and Registers | ||
| eQEP: | eQEP Module and Registers | ||
| ADC: | ADC Status, Control, and Configuration Registers | ||
| ADC: | ADC Result Registers | ||
| DAC: | DAC Control Registers |