JAJSGG6F january   2010  – june 2023 TMS3705

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 説明
  5. 4 Functional Block Diagram
  6. 5 Revision History
  7. 6 Device Characteristics
    1. 6.1 Related Products
  8. 7 Terminal Configuration and Functions
    1. 7.1 Pin Diagram
    2. 7.2 Signal Descriptions
  9. 8 Specifications
    1. 8.1 Absolute Maximum Ratings #GUID-D01738F0-6DD5-4A5A-BE33-2BC076228CBE/AMR001
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Electrical Characteristics
    5. 8.5 Thermal Resistance Characteristics for D (SOIC) Package
    6. 8.6 Switching Characteristics
    7. 8.7 Timing Diagrams
  10. 9 Detailed Description
    1. 9.1  Power Supply
    2. 9.2  Oscillator
    3. 9.3  Predrivers
    4. 9.4  Full Bridge
    5. 9.5  RF Amplifier
    6. 9.6  Band-Pass Filter and Limiter
    7. 9.7  Diagnosis
    8. 9.8  Power-on Reset
    9. 9.9  Frequency Divider
    10. 9.10 Digital Demodulator
    11. 9.11 Transponder Resonance-Frequency Measurement
    12. 9.12 SCI Encoder
    13. 9.13 Control Logic
    14. 9.14 Test Pins
  11. 10Applications, Implementation, and Layout
    1. 10.1 Application Diagram
  12. 11Device and Documentation Support
    1. 11.1 Getting Started and Next Steps
    2. 11.2 Device Nomenclature
    3. 11.3 Tools and Software
    4. 11.4 Documentation Support
    5. 11.5 サポート・リソース
    6. 11.6 Trademarks
    7. 11.7 静電気放電に関する注意事項
    8. 11.8 用語集
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.6 Switching Characteristics

VDD = 4.5 V to 5.5 V, fosc = 4 MHz, F_SEL = high, over operating free-air temperature range (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
tinit minTime for TXCT high to initialize a new transmissionFrom start of the oscillator after power on or waking up until reaching the Idle state (see Figure 8-1, Figure 8-2, Figure 8-3)22.052.2ms
tdiagDelay between leaving Idle state and start of diagnosis byte at SCIONormal operation (see Figure 8-1, Figure 8-2, Figure 8-3)22.122.2ms
tRDelay between end of charge or end of program and start of transponder data transmit on SCIOSee Figure 8-1, Figure 8-2, Figure 8-3.3ms
toffWrite pulse pauseSee Figure 8-5.0.1ms
tdwriteSignal delay on TXCT for controlling the full bridgeWrite mode737985µs
tmcrNRZ bit duration for mode control registerSee Figure 8-4.121128135µs
tsciNRZ bit duration on SCIOAsynchronous mode (see Figure 8-6)636465µs
tdstopLow signal delay on TXCT to stopSynchronous mode128800µs
tt_syncTotal TXCT time for reading data on SCIOSynchronous mode (see Figure 8-7)900µs
tsyncTXCT period for shifting data on SCIOSynchronous mode (seeFigure 8-7)464100µs
tL_syncLow phase on TXCTSynchronous mode (see Figure 8-7)232tsync – 2µs
treadyData ready for output after SCIO goes highSynchronous mode (see Figure 8-7)1127µs