JAJSGN7A December   2018  – February 2024 TMUX1109

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics (VDD = 5V ±10 %)
    6. 5.6 Electrical Characteristics (VDD = 3.3V ±10 %)
    7. 5.7 Electrical Characteristics (VDD = 2.5V ±10 %), (VSS = –2.5V ±10 %)
    8. 5.8 Electrical Characteristics (VDD = 1.8V ±10 %)
    9. 5.9 Electrical Characteristics (VDD = 1.2V ±10 %)
    10.     Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
      1. 6.1.1  On-Resistance
      2. 6.1.2  Off-Leakage Current
      3. 6.1.3  On-Leakage Current
      4. 6.1.4  Transition Time
      5. 6.1.5  Break-Before-Make
      6. 6.1.6  tON(EN) and tOFF(EN)
      7. 6.1.7  Charge Injection
      8. 6.1.8  Off Isolation
      9. 6.1.9  Crosstalk
      10. 6.1.10 Bandwidth
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Bidirectional Operation
      2. 6.3.2 Rail to Rail Operation
      3. 6.3.3 1.8V Logic Compatible Inputs
      4. 6.3.4 Fail-Safe Logic
      5. 6.3.5 Ultra-Low Leakage Current
      6. 6.3.6 Ultra-Low Charge Injection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Truth Tables
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • PW|16
  • RSV|16
サーマルパッド・メカニカル・データ
発注情報

6.3.4 Fail-Safe Logic

The TMUX1109 supports Fail-Safe Logic on the control input pins (EN, A0, A1) allowing for operation up to 5.5V above VSS, regardless of the state of the supply pin. This feature allows voltages on the control pins to be applied before the supply pin, protecting the device from potential damage. Fail-Safe Logic minimizes system complexity by removing the need for power supply sequencing on the logic control pins. For example, the Fail-Safe Logic feature allows the select pins of the TMUX1109 to be ramped to 5.5V while VDD = 0V. Additionally, the feature enables operation of the TMUX1109 with VDD = 1.2V while allowing the select pins to interface with a logic level of another device up to 5.5V.