JAJSLW1 July   2021 TMUX1248

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics (VDD = 5 V ±10 %), GND = 0 V unless otherwise specified.
    6. 6.6 Electrical Characteristics (VDD = 3.3 V ±10 %), GND = 0 V unless otherwise specified.
    7. 6.7 Electrical Characteristics (VDD = 1.8 V ±10 %), GND = 0 V unless otherwise specified.
    8. 6.8 Electrical Characteristics (VDD = 1.2 V ±10 %), GND = 0 V unless otherwise specified.
    9. 6.9 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1 On-Resistance
    2. 7.2 Off-Leakage Current
    3. 7.3 On-Leakage Current
    4. 7.4 Transition Time
    5. 7.5 Break-Before-Make
    6. 7.6 Charge Injection
    7. 7.7 Off Isolation
    8. 7.8 Crosstalk
    9. 7.9 Bandwidth
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Bidirectional Operation
      2. 8.3.2 Rail to Rail Operation
      3. 8.3.3 1.8 V Logic Compatible Inputs
      4. 8.3.4 Fail-Safe Logic
    4. 8.4 Device Functional Modes
    5. 8.5 Truth Tables
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Layout Information
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Layout Information

When a PCB trace turns a corner at a 90° angle, a reflection can occur. A reflection primarily occurs because the width of the trace changes. At the apex of the turn, the trace width increases to 1.414 times its width. This increase upsets the transmission-line characteristics, especially the distributed capacitance and self–inductance of the trace which results in the reflection. Not all PCB traces can be straight and therefore some traces must turn corners. Figure 10-1 shows progressively better techniques of rounding corners. Only the last example (BEST) maintains constant trace width and minimizes reflections.

GUID-8814D462-9527-46AF-9AAC-4CE56B228874-low.gifFigure 10-1 Trace Example

Route high-speed signals using a minimum of vias and corners which reduces signal reflections and impedance changes. When a via must be used, increase the clearance size around it to minimize its capacitance. Each via introduces discontinuities in the signal’s transmission line and increases the chance of picking up interference from the other layers of the board. Be careful when designing test points, through-hole pins are not recommended at high frequencies.

Figure 10-2 illustrates an example of a PCB layout with the TMUX1248. Some key considerations are:

  • Decouple the VDD pin with a 0.1-µF capacitor, placed as close to the pin as possible. Make sure that the capacitor voltage rating is sufficient for the VDD supply.
  • Keep the input lines as short as possible.
  • Use a solid ground plane to help reduce electromagnetic interference (EMI) noise pickup.
  • Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if possible, and only make perpendicular crossings when necessary.