JAJSJL5F december   2019  – july 2023 TMUX1308-Q1 , TMUX1309-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information: TMUX1308-Q1
    5. 7.5  Thermal Information: TMUX1309-Q1
    6. 7.6  Electrical Characteristics
    7. 7.7  Logic and Dynamic Characteristics
    8. 7.8  Timing Characteristics
    9. 7.9  Injection Current Coupling
    10. 7.10 Typical Characteristics
  9. 8 Parameter Measurement Information
    1. 8.1  On-Resistance
    2. 8.2  Off-Leakage Current
    3. 8.3  On-Leakage Current
    4. 8.4  Transition Time
    5. 8.5  Break-Before-Make
    6. 8.6  tON(EN) and tOFF(EN)
    7. 8.7  Charge Injection
    8. 8.8  Off Isolation
    9. 8.9  Crosstalk
    10. 8.10 Bandwidth
    11. 8.11 Injection Current Control
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Bidirectional Operation
      2. 9.3.2 Rail-to-Rail Operation
      3. 9.3.3 1.8 V Logic Compatible Inputs
      4. 9.3.4 Fail-Safe Logic
      5. 9.3.5 Injection Current Control
        1. 9.3.5.1 TMUX13xx-Q1 is Powered, Channel is Unselected, and the Input Signal is Greater Than VDD (VDD = 5 V, VINPUT = 5.5 V)
        2. 9.3.5.2 TMUX13xx-Q1 is Powered, Channel is Selected, and the Input Signal is Greater Than VDD (VDD = 5 V, VINPUT = 5.5 V)
        3. 9.3.5.3 TMUX13xx-Q1 is Unpowered and the Input Signal has a Voltage Present (VDD = 0 V, VINPUT = 3 V)
    4. 9.4 Device Functional Modes
    5. 9.5 Truth Tables
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Short To Battery Protection
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.5 Thermal Information: TMUX1309-Q1

THERMAL METRIC(1) TMUX1309-Q1 UNIT
PW (TSSOP) DYY (SOT) BQB (WQFN)
PINS PINS PINS
RθJA Junction-to-ambient thermal resistance 139.6  172.4 94.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 77.2 107.0 92.6 °C/W
RθJB Junction-to-board thermal resistance 84.2 96.1 64.5 °C/W
ΨJT Junction-to-top characterization parameter 26.5 19.7 13.3 °C/W
ΨJB Junction-to-board characterization parameter 83.8 95.9 64.4 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A 42.7 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.