JAJSUX4 June   2024 TMUX1308A , TMUX1309A

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Thermal Information: TMUX1308A
    4. 6.4  Thermal Information: TMUX1309A
    5. 6.5  Recommended Operating Conditions
    6. 6.6  Electrical Characteristics
    7. 6.7  Logic and Dynamic Characteristics
    8. 6.8  Timing Characteristics
    9. 6.9  Injection Current Coupling
    10. 6.10 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1  On-Resistance
    2. 7.2  Off-Leakage Current
    3. 7.3  On-Leakage Current
    4. 7.4  Transition Time
    5. 7.5  Break-Before-Make
    6. 7.6  tON(EN) and tOFF(EN)
    7. 7.7  Charge Injection
    8. 7.8  Off Isolation
    9. 7.9  Crosstalk
    10. 7.10 Bandwidth
    11. 7.11 Injection Current Control
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Bidirectional Operation
      2. 8.3.2 Rail-to-Rail Operation
      3. 8.3.3 1.8V Logic Compatible Inputs
      4. 8.3.4 Fail-Safe Logic
      5. 8.3.5 High-Impedance Optimization
      6. 8.3.6 Injection Current Control
        1. 8.3.6.1 TMUX13xxA is Powered, Channel is Unselected, and the Input Signal is Greater Than VDD (VDD = 5V, VINPUT = 5.5V)
        2. 8.3.6.2 TMUX13xxA is Powered, Channel is Selected, and the Input Signal is Greater Than VDD (VDD = 5V, VINPUT = 5.5V)
        3. 8.3.6.3 TMUX13xxA is Unpowered and the Input Signal has a Voltage Present (VDD = 0V, VINPUT = 3V)
    4. 8.4 Device Functional Modes
    5. 8.5 Truth Tables
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Short To Battery Protection
      4. 9.2.4 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Mechanical, Packaging, and Orderable Information
  13. 12Revision History

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • PW|16
サーマルパッド・メカニカル・データ
発注情報

6.7 Logic and Dynamic Characteristics

At specified VDD ±10%
Typical values measured at nominal VDD and TA = 25°C.
PARAMETER TEST CONDITIONS VDD Operating free-air temperature (TA) UNIT
–40°C to 125°C
MIN TYP MAX
LOGIC INPUTS (EN, A0, A1, A2)
VIH Input logic high 1.8V 0.95 5.5 V
2.5V 1.1 5.5
3.3V 1.15 5.5
5V 1.25 5.5
VIL Input logic low 1.8V 0 0.6 V
2.5V 0 0.7
3.3V 0 0.8
5V 0 0.95
IIH Logic high input leakage current VLOGIC = 1.8V or VDD All 1 uA
IIL Logic low input leakage current VLOGIC = 0V All –1 uA
CIN Logic input capacitance VLOGIC = 0V, 1.8V, VDD
f = 1MHz		 All 1 2 pF
DYNAMIC CHARACTERISTICS
QINJ Charge Injection VS = VDD / 2
RS = 0Ω, CL = 100pF		 1.8V –0.5 pC
2.5V –0.5
3.3V –0.8
5V –1.5
OISO Off Isolation VBIAS = VDD / 2
VS = 200mVpp
RL = 50Ω, CL = 5pF
f = 100kHz		 1.8V –110 dB
2.5V –110
3.3V –110
5V –110
OISO Off Isolation VBIAS = VDD / 2
VS = 200mVpp
RL = 50Ω, CL = 5pF
f = 1MHz		 1.8V –90 dB
2.5V –90
3.3V –90
5V –90
XTALK Crosstalk VBIAS = VDD / 2
VS = 200mVpp
RL = 50Ω, CL = 5pF
f = 100kHz		 1.8V –110 dB
2.5V –110
3.3V –110
5V –110
XTALK Crosstalk VBIAS = VDD / 2
VS = 200mVpp
RL = 50Ω, CL = 5pF
f = 1MHz		 1.8V –90 dB
2.5V –90
3.3V –90
5V –90
BW Bandwidth VBIAS = VDD / 2
VS = 200mVpp
RL = 50Ω, CL = 5pF		 1.8V 350 MHz
2.5V 450
3.3V 500
5V 500