JAJSOH2C April   2022  – February 2024 TMUX6236

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Thermal Information
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Source or Drain Continuous Current
    6. 5.6  ±15V Dual Supply: Electrical Characteristics 
    7. 5.7  ±15V Dual Supply: Switching Characteristics 
    8. 5.8  36V Single Supply: Electrical Characteristics 
    9. 5.9  36V Single Supply: Switching Characteristics 
    10. 5.10 12V Single Supply: Electrical Characteristics 
    11. 5.11 12V Single Supply: Switching Characteristics 
    12. 5.12 ±5V Dual Supply: Electrical Characteristics 
    13. 5.13 ±5V Dual Supply: Switching Characteristics 
    14. 5.14 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1  On-Resistance
    2. 6.2  Off-Leakage Current
    3. 6.3  On-Leakage Current
    4. 6.4  Transition Time
    5. 6.5  tON(EN) and tOFF(EN)
    6. 6.6  Break-Before-Make
    7. 6.7  tON (VDD) Time
    8. 6.8  Propagation Delay
    9. 6.9  Charge Injection
    10. 6.10 Off Isolation
    11. 6.11 Crosstalk
    12. 6.12 Bandwidth
    13. 6.13 THD + Noise
    14. 6.14 Power Supply Rejection Ratio (PSRR)
  8. 7 Detailed Description
    1. 7.1 Functional Block Diagram
    2. 7.2 Feature Description
      1. 7.2.1 Bidirectional Operation
      2. 7.2.2 Rail to Rail Operation
      3. 7.2.3 1.8V Logic Compatible Inputs
      4. 7.2.4 Integrated Pull-Down Resistor on Logic Pins
      5. 7.2.5 Fail-Safe Logic
      6. 7.2.6 Latch-Up Immune
      7. 7.2.7 Ultra-Low Charge Injection
    3. 7.3 Device Functional Modes
    4. 7.4 Truth Tables
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 用語集
    6. 9.6 静電気放電に関する注意事項
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • PW|16
  • RUM|16
サーマルパッド・メカニカル・データ
発注情報

5.6 ±15V Dual Supply: Electrical Characteristics 

VDD = +15V ± 10%, VSS = –15V ±10%, GND = 0V (unless otherwise noted) 
Typical at VDD = +15V, VSS = –15V, TA = 25℃  (unless otherwise noted)
PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT
ANALOG SWITCH
RON On-resistance VS = –10V to +10V
ID = –10mA
Refer to On-Resistance		 25°C 2 2.7 Ω
–40°C to +85°C 3.4 Ω
–40°C to +125°C 4 Ω
ΔRON On-resistance mismatch between channels VS = –10V to +10V
ID = –10mA
Refer to On-Resistance		 25°C 0.1 0.18 Ω
–40°C to +85°C 0.19 Ω
–40°C to +125°C 0.21 Ω
RON FLAT On-resistance flatness VS = –10V to +10V
IS = –10mA
Refer to On-Resistance		 25°C 0.2 0.46 Ω
–40°C to +85°C 0.65 Ω
–40°C to +125°C 0.7 Ω
RON DRIFT On-resistance drift VS = 0V, IS = –10mA
Refer to On-Resistance		 –40°C to +125°C 0.008 Ω/°C
IS(OFF) Source off leakage current(1) VDD = 16.5V, VSS = –16.5V
Switch state is off
VS = +10V / –10V
VD = –10V / + 10V
Refer to Off-Leakage Current		 25°C –0.35 0.05 0.35 nA
–40°C to +85°C –3 3 nA
–40°C to +125°C –20 20 nA
ID(OFF) Drain off leakage current(1) VDD = 16.5V, VSS = –16.5V
Switch state is off
VS = +10V / –10V
VD = –10V / + 10V
Refer to Off-Leakage Current		 25°C –0.6 0.1 0.6 nA
–40°C to +85°C –7 7 nA
–40°C to +125°C –45 45 nA
IS(ON)
ID(ON)		 Channel on leakage current(2) VDD = 16.5V, VSS = –16.5V
Switch state is on
VS = VD = ±10V
Refer to On-Leakage Current		 25°C –0.5 0.05 0.5 nA
–40°C to +85°C –3.5 3.5 nA
–40°C to +125°C –25 25 nA
LOGIC INPUTS (SEL / EN pins)
VIH Logic voltage high –40°C to +125°C 1.3 36 V
VIL Logic voltage low –40°C to +125°C 0 0.8 V
IIH Input leakage current –40°C to +125°C 0.4 2 µA
IIL Input leakage current –40°C to +125°C –1.5 –0.005 µA
CIN Logic input capacitance –40°C to +125°C 3.5 pF
POWER SUPPLY
IDD VDD supply current VDD = 16.5V, VSS = –16.5V
Logic inputs = 0V, 5V, or VDD		 25°C 45 60 µA
–40°C to +85°C 70 µA
–40°C to +125°C 85 µA
ISS VSS supply current VDD = 16.5V, VSS = –16.5V
Logic inputs = 0V, 5V, or VDD		 25°C 7 24 µA
–40°C to +85°C 30 µA
–40°C to +125°C 38 µA
(1) When VS is positive, VD is negative, or when VS is negative, VD is positive.
(2) When VS is at a voltage potential, VD is floating, or when VD is at a voltage potential, VS is floating.