JAJSNE3B march   2022  – july 2023 TMUX7348F , TMUX7349F

PRODMIX  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Thermal Information
    4. 7.4  Recommended Operating Conditions
    5. 7.5  Electrical Characteristics (Global)
    6. 7.6  ±15 V Dual Supply: Electrical Characteristics
    7. 7.7  ±20 V Dual Supply: Electrical Characteristics
    8. 7.8  12 V Single Supply: Electrical Characteristics
    9. 7.9  36 V Single Supply: Electrical Characteristics
    10. 7.10 Typical Characteristics
  9. 8 Parameter Measurement Information
    1. 8.1  On-Resistance
    2. 8.2  Off-Leakage Current
    3. 8.3  On-Leakage Current
    4. 8.4  Input and Output Leakage Current Under Overvoltage Fault
    5. 8.5  Break-Before-Make Delay
    6. 8.6  Enable Delay Time
    7. 8.7  Transition Time
    8. 8.8  Fault Response Time
    9. 8.9  Fault Recovery Time
    10. 8.10 Fault Flag Response Time
    11. 8.11 Fault Flag Recovery Time
    12. 8.12 Charge Injection
    13. 8.13 Off Isolation
    14. 8.14 Crosstalk
    15. 8.15 Bandwidth
    16. 8.16 THD + Noise
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Flat ON- Resistance
      2. 9.3.2 Protection Features
        1. 9.3.2.1 Input Voltage Tolerance
        2. 9.3.2.2 Powered-Off Protection
        3. 9.3.2.3 Fail-Safe Logic
        4. 9.3.2.4 Overvoltage Protection and Detection
        5. 9.3.2.5 Adjacent Channel Operation During Fault
        6. 9.3.2.6 ESD Protection
        7. 9.3.2.7 Latch-Up Immunity
        8. 9.3.2.8 EMC Protection
      3. 9.3.3 Overvoltage Fault Flags
      4. 9.3.4 Bidirectional and Rail-to-Rail Operation
      5. 9.3.5 1.8 V Logic Compatible Inputs
      6. 9.3.6 Integrated Pull-Down Resistor on Logic Pins
    4. 9.4 Device Functional Modes
      1. 9.4.1 Normal Mode
      2. 9.4.2 Fault Mode
      3. 9.4.3 Truth Tables
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.3.2.4 Overvoltage Protection and Detection

The TMUX7348F and TMUX7349F detect overvoltage inputs by comparing the voltage on a source pin (Sx) with the fault supplies (VFP and VFN). A signal is considered overvoltage if it exceeds the fault supply voltages by the threshold voltage (VT).

When an overvoltage is detected, the switch automatically turns OFF regardless of the logic controls. The source pin becomes high impedance and allows only a small leakage current to flow through the switch and the overvoltage does not appear on the drain. When the overvoltage channel is selected by the logic control, the drain pin (D or Dx) is pulled to the supply that was exceeded. For example, if the source voltage exceeds VFP, then the drain output is pulled to VFP. If the source voltage exceeds VFN, then the drain output is pulled to VFN. The pull-up impedance is approximately 40 kΩ, and as a result, the drain current is limited to roughly 1 mA during a shorted load (to GND) condition.

Figure 9-19 shows a detailed view of how the pullup or down controls the output state of the drain pin under a fault scenario.

GUID-BC428BB8-AC52-44AE-B28B-64E37561F954-low.svg Figure 9-1 Detailed Functional Diagram

VFP and VFN are required fault supplies that set the level at which the overvoltage protection is engaged. VFP can be supplied from 3 V to VDD, while the VFN can be supplied from VSS to 0 V. If the fault supplies are not available in the system, then the VFP pin must be connected to VDD, while the VFN pin must be connected to VSS. In this case, overvoltage protection then engages at the primary supply voltages VDD and VSS.