SLASEY7A June   2024  – November 2024 TMUXHS4612

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 High-Speed Performance Parameters
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application - HDMI
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
    5. 8.5 Systems Examples
      1. 8.5.1 DisplayPort 2:1 Mulitplexing
      2. 8.5.2 DisplayPort 1:2 Mulitplexing
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

4 Pin Configuration and Functions

Figure 4-1 RET Package 40-Pin WQFN With Exposed Thermal Pad (Top View)
Table 4-1 Pin Functions
PIN TYPE DESCRIPTION
NAME NO.
EN 1 I

Device Enable

L: Device Disabled. All data and sideband signals in Hi-Z.

H: Device Enabled. All data and sideband signals selected by D_AB_SEL and SIDEBAND_SEL are enabled.
D_AB_SEL 2 I

Selects between high-speed datapath A and B.

L: High-speed datapath A

H: High-speed datapath B
SIDEBAND_SEL 3 I

Selects between sideband path A and B

L: Sideband path A

H: Sideband path B
D0– 4 I/O Common Port, Channel 0, –ve signal
D0+ 5 I/O Common Port, Channel 0, +ve signal
D1– 6 I/O Common Port, Channel 1, –ve signal
D1+ 7 I/O Common Port, Channel 1, +ve signal
D2– 8 I/O Common Port, Channel 2, –ve signal
D2+ 9 I/O Common Port, Channel 2, +ve signal
D3– 10 I/O Common Port, Channel 3,–ve signal
D3+ 11 I/O Common Port, Channel 3, +ve signal
HPD_A 12 I/O Port A, Hot Plug Detect sideband signal
HPD_B 13 I/O Port B, Hot Plug Detect sideband signal
HPD 14 I/O Common Port, Hot Plug Detect sideband signal
GND 15 GND Ground
DDC_AUX+ 16 I/O Common Port, DDC or AUX sideband signal
DDC_AUX+A 17 I/O Port A, DDC or AUX sideband signal
GND 18 GND Ground
DDC_AUX+B 19 I/O Port B, DDC or AUX sideband signal
D3+B 20 I/O Port B, Channel 3, +ve signal
D3–B 21 I/O Port B, Channel 3, –ve signal
D2+B 22 I/O Port B, Channel 2, +ve signal
D2–B 23 I/O Port B, Channel 2,–ve signal
D1+B 24 I/O Port B, Channel 1, +ve signal
D1–B 25 I/O Port B, Channel 1, –ve signal
D0+B 26 I/O Port B, Channel 0, +ve signal
D0–B 27 I/O Port B, Channel 0, –ve signal
D3+A 28 I/O Port A, Channel 3, +ve signal
D3–A 29 I/O Port A, Channel 3, –ve signal
D2+A 30 I/O Port A, Channel 2, +ve signal
D2–A 31 I/O Port A, Channel 2,–ve signal
D1+A 32 I/O Port A, Channel 1, +ve signal
D1-A 33 I/O Port A, Channel 1, –ve signal
D0+A 34 I/O Port A, Channel 0, +ve signal
D0–A 35 I/O Port A, Channel 0, –ve signal
VCC 36 Power Supply Voltage
GND 37 GND Ground
DDC_AUX-B 38 I/O Port B, DDC or AUX sideband signal
DDC_AUX-A 39 I/O Port A, DDC or AUX sideband signal
DDC_AUX- 40 I/O Common Port, DDC or AUX sideband signal
GND PowerPad GND Ground