SLOS794B September   2012  – September 2015 TPA3110D2-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 DC Characteristics
    6. 6.6 DC Characteristics
    7. 6.7 AC Characteristics
    8. 6.8 AC Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 DC Detect
      2. 7.3.2 Short-Circuit Protection and Automatic Recovery Feature
      3. 7.3.3 Thermal Protection
      4. 7.3.4 GVDD Supply
    4. 7.4 Device Functional Modes
      1. 7.4.1 PBTL Select
      2. 7.4.2 Gain Setting Through GAIN0 and GAIN1 Inputs
      3. 7.4.3 SD Operation
      4. 7.4.4 PLIMIT
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 TPA3110D2-Q1 Modulation Scheme
        2. 8.2.2.2 Ferrite Bead Filter Considerations
        3. 8.2.2.3 Efficiency: LC Filter Required With the Traditional Class-D Modulation Scheme
        4. 8.2.2.4 When to Use an Output Filter for EMI Suppression
        5. 8.2.2.5 Input Resistance
        6. 8.2.2.6 Input Capacitor, CI
        7. 8.2.2.7 BSN and BSP Capacitors
        8. 8.2.2.8 Differential Inputs
        9. 8.2.2.9 Using Low-ESR Capacitors
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VCC Supply voltage AVCC, PVCC –0.3 30 V
VI Interface pin voltage SD, GAIN0, GAIN1, PBTL, FAULT(2) –0.3 VCC + 0.3 V
< 10 V/ms
PLIMIT –0.3 GVDD + 0.3 V
RINN, RINP, LINN, LINP –0.3 6.3 V
RL Minimum load resistance BTL: PVCC > 15 V 4.8
BTL: PVCC ≤ 15 V 3.2
PBTL 3.2
Continuous total power dissipation See the Thermal Information Table
TA Operating free-air temperature –40 125 °C
TJ Operating junction temperature(3) –40 150 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operations of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The voltage slew rate of these pins must be restricted to no more than 10 V/ms. For higher slew rates, use a 100-kΩ resistor in series with the pins, per application note SLUA626.
(3) The TPA3110D2-Q1 incorporates an exposed thermal pad on the underside of the chip. This acts as a heatsink, and it must be connected to a thermally dissipating plane for proper power dissipation. Failure to do so may result in the device going into thermal protection shutdown. See TI Technical Brief SLMA002 for more information about using the TSSOP thermal pad.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±4000 V
Charged-device model (CDM), per AEC Q100-011 ±250
Machine Model (MM) per JESD22-A115 ±200
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VCC Supply voltage PVCC, AVCC 8 26 V
VIH High-level input voltage SD, GAIN0, GAIN1, PBTL 2 V
VIL Low-level input voltage SD, GAIN0, GAIN1, PBTL 0.8 V
VOL Low-level output voltage FAULT, RPULL-UP = 100k, VCC = 26 V 0.8 V
IIH High-level input current SD, GAIN0, GAIN1, PBTL, VI = 2 V, VCC = 18 V 50 µA
IIL Low-level input current SD, GAIN0, GAIN1, PBTL, VI = 0.8 V, VCC = 18 V 5 µA
TA Operating free-air temperature –40 125 °C

6.4 Thermal Information

THERMAL METRIC(1)(2) TPA3110D2-Q1 UNIT
PWP (HTSSOP)
28 Pins
θJA Junction-to-ambient thermal resistance 30.3 °C/W
θJCtop Junction-to-case (top) thermal resistance 33.5 °C/W
θJB Junction-to-board thermal resistance 17.5 °C/W
ψJT Junction-to-top characterization parameter 0.9 °C/W
ψJB Junction-to-board characterization parameter 7.2 °C/W
θJCbot Junction-to-case (bottom) thermal resistance 0.9 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
(2) For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator.

6.5 DC Characteristics

TA = –40°C to 125°C, VCC = 24 V, RL = 8 Ω (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
| VOS | Class-D output offset voltage (measured differentially) VI = 0 V, Gain = 36 dB 1.5 15 mV
ICC Quiescent supply current SD = 2 V, no load, PVCC = 24 V 32 50 mA
ICC(SD) Quiescent supply current in shutdown mode SD = 0.8 V, no load, PVCC = 24 V 250 400 µA
rDS(on) Drain-source on-state resistance VCC = 12 V, IO = 500 mA,
TJ = 25°C		 High side 240 mΩ
Low side 240
G Gain GAIN1 = 0.8 V GAIN0 = 0.8 V 19 20 21 dB
GAIN0 = 2 V 25 26 27
GAIN1 = 2 V GAIN0 = 0.8 V 31 32 33 dB
GAIN0 = 2 V 35 36 37
ton Turn-on time SD = 2 V 14 ms
tOFF Turn-off time SD = 0.8 V 2 μs
GVDD Gate drive supply IGVDD = 100 μA 6.4 6.9 7.4 V
tDCDET DC detect time V(RINN) = 6 V, VRINP = 0 V 420 ms

6.6 DC Characteristics

TA = –40°C to 125°C, VCC = 12 V, RL = 8 Ω (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
| VOS | Class-D output offset voltage (measured differentially) VI = 0 V, Gain = 36 dB 1.5 15 mV
ICC Quiescent supply current SD = 2 V, no load, PVCC = 12 V 20 35 mA
ICC(SD) Quiescent supply current in shutdown mode SD = 0.8 V, no load, PVCC = 12 V 200 µA
rDS(on) Drain-source on-state resistance VCC = 12 V, IO = 500 mA,
TJ = 25°C		 High side 240 mΩ
Low side 240
G Gain GAIN1 = 0.8 V GAIN0 = 0.8 V 19 20 21 dB
GAIN0 = 2 V 25 26 27
GAIN1 = 2 V GAIN0 = 0.8 V 31 32 33 dB
GAIN0 = 2 V 35 36 37
tON Turn-on time SD = 2 V 14 ms
tOFF Turn-off time SD = 0.8 V 2 μs
GVDD Gate drive supply IGVDD = 2 mA 6.4 6.9 7.4 V
VO Output voltage maximum under PLIMIT control V(PLIMIT) = 2 V; VI = 1 VRMS 6.75 7.90 8.75 V

6.7 AC Characteristics

TA = –40°C to 125°C, VCC = 24 V, RL = 8 Ω (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
KSVR Power supply ripple rejection 200 mVPP ripple at 1 kHz,
Gain = 20 dB, inputs AC-coupled to AGND		 –70 dB
PO Continuous output power THD+N = 10%, f = 1 kHz, VCC = 16 V 15 W
THD+N Total harmonic distortion + noise VCC = 16 V, f = 1 kHz, PO = 7.5 W (half-power) 0.1%
Vn Output integrated noise 20 Hz to 22 kHz, A-weighted filter, Gain = 20 dB 65 µV
–80 dBV
Crosstalk VO = 1 VRMS, Gain = 20 dB, f = 1 kHz –100 dB
SNR Signal-to-noise ratio Maximum output at THD+N < 1%, f = 1 kHz,
Gain = 20 dB, A-weighted		 102 dB
fOSC Oscillator frequency 250 310 350 kHz
Thermal trip point 150 °C
Thermal hysteresis 15 °C

6.8 AC Characteristics

TA = –40°C to 125°C, VCC = 12 V, RL = 8 Ω (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
KSVR Supply ripple rejection 200 mVPP ripple from 20 Hz–1 kHz,
Gain = 20 dB, inputs AC-coupled to AGND		 –70 dB
PO Continuous output power THD+N = 10%, f = 1 kHz; VCC = 13 V 10 W
THD+N Total harmonic distortion + noise RL = 8 Ω, f = 1 kHz, PO = 5 W (half-power) 0.06%
Vn Output integrated noise 20 Hz to 22 kHz, A-weighted filter, Gain = 20 dB 65 µV
–80 dBV
Crosstalk Po = 1 W, Gain = 20 dB, f = 1 kHz –100 dB
SNR Signal-to-noise ratio Maximum output at THD+N < 1%, f = 1 kHz,
Gain = 20 dB, A-weighted		 102 dB
fOSC Oscillator frequency 250 310 350 kHz
Thermal trip point 150 °C
Thermal hysteresis 15 °C

6.9 Typical Characteristics

All measurements taken at 1 kHz, unless otherwise noted. The TPA3110D2-Q1 EVM (which is available at ti.com) made the measurements.
TPA3110D2-Q1 g001_los528.gif
Figure 1. Total Harmonic Distortion vs Frequency (BTL)
TPA3110D2-Q1 g003_los528.gif
Figure 3. Total Harmonic Distortion vs Frequency (BTL)
TPA3110D2-Q1 g005_los528.gif
Figure 5. Total Harmonic Distortion vs Frequency (BTL)
TPA3110D2-Q1 g007_los528.gif
Lighter color represents thermally limited region.
Figure 7. Total Harmonic Distortion + Noise vs Output Power (BTL)
TPA3110D2-Q1 g009_los528.gif
Figure 9. Total Harmonic Distortion + Noise vs Output Power (BTL)
TPA3110D2-Q1 g011_los528.gif
Figure 11. Total Harmonic Distortion + Noise vs Output Power (BTL)
TPA3110D2-Q1 g013_los528.gif
Figure 13. Maximum Output Power vs PLIMIT Voltage (BTL)
TPA3110D2-Q1 g015_los528.gif
Figure 15. Gain/Phase vs Frequency (BTL)
TPA3110D2-Q1 g017_los528.gif
Note: Dashed lines represent thermally limited regions.
Figure 17. Output Power vs Supply Voltage (BTL)
TPA3110D2-Q1 g032_los528.gif
Figure 19. Efficiency vs Output Power (BTL With LC Filter)
TPA3110D2-Q1 g033_los528.gif
Figure 21. Efficiency vs Output Power (BTL With LC Filter)
TPA3110D2-Q1 g034_los528.gif
Figure 23. Efficiency vs Output Power (BTL With LC Filter)
TPA3110D2-Q1 g022_los528.gif
Note: Dashed lines represent thermally limited regions.
Figure 25. Supply Current vs Total Output Power (BTL)
TPA3110D2-Q1 g024_los528.gif
Figure 27. Supply Ripple Rejection Ratio vs Frequency (BTL)
TPA3110D2-Q1 g026_los528.gif
Figure 29. Total Harmonic Distortion + Noise vs Output Power (PBTL)
TPA3110D2-Q1 g028_los528.gif
Note: Dashed lines represent thermally limited regions.
Figure 31. Output Power vs Supply Voltage (PBTL)
TPA3110D2-Q1 g030_los528.gif
Figure 33. Supply Current vs Output Power (PBTL)
TPA3110D2-Q1 g002_los528.gif
Figure 2. Total Harmonic Distortion vs Frequency (BTL)
TPA3110D2-Q1 g004_los528.gif
Figure 4. Total Harmonic Distortion vs Frequency (BTL)
TPA3110D2-Q1 g006_los528.gif
Figure 6. Total Harmonic Distortion vs Frequency (BTL)
TPA3110D2-Q1 g008_los528.gif
Figure 8. Total Harmonic Distortion + Noise vs Output Power (BTL)
TPA3110D2-Q1 g010_los528.gif
Figure 10. Total Harmonic Distortion + Noise vs Output Power (BTL)
TPA3110D2-Q1 g012_los528.gif
Figure 12. Total Harmonic Distortion + Noise vs Output Power (BTL)
TPA3110D2-Q1 g014_los528.gif
Note: Dashed lines represent thermally limited regions.
Figure 14. Output Power vs PLIMIT Voltage (BTL)
TPA3110D2-Q1 g016_los528.gif
Note: Dashed lines represent thermally limited regions.
Figure 16. Output Power vs Supply Voltage (BTL)
TPA3110D2-Q1 g018_los528.gif
Note: Dashed lines represent thermally limited regions.
Figure 18. Efficiency vs Output Power (BTL)
TPA3110D2-Q1 g019_los528.gif
Note: Dashed lines represent thermally limited regions.
Figure 20. Efficiency vs Output Power (BTL)
TPA3110D2-Q1 g020_los528.gif
Figure 22. Efficiency vs Output Power (BTL)
TPA3110D2-Q1 g021_los528.gif
Note: Dashed lines represent thermally limited regions.
Figure 24. Supply Current vs Total Output Power (BTL)
TPA3110D2-Q1 g023_los528.gif
Figure 26. Crosstalk vs Frequency (BTL)
TPA3110D2-Q1 g025_los528.gif
Figure 28. Total Harmonic Distortion vs Frequency (PBTL)
TPA3110D2-Q1 g027_los528.gif
Figure 30. Gain/Phase vs Frequency (PBTL)
TPA3110D2-Q1 g029_los528.gif
Figure 32. Efficiency vs Output Power (PBTL)
TPA3110D2-Q1 g031_los528.gif
Figure 34. Supply Ripple Rejection Ratio vs Frequency (PBTL)