JAJSD67A April   2016  – November 2016 TPA3244

PRODUCTION DATA.  

1. 1 特長
2. 2 アプリケーション
3. 3 概要
4. 4 改訂履歴
5. 5 Device Comparison Table
6. 6 Pin Configuration and Functions
7. 7 Specifications
   1. 7.1 Absolute Maximum Ratings
   2. 7.2 ESD Ratings
   3. 7.3 Recommended Operating Conditions
   4. 7.4 Thermal Information
   5. 7.5 Electrical Characteristics
   6. 7.6 Audio Characteristics (BTL)
   7. 7.7 Audio Characteristics (SE)
   8. 7.8 Audio Characteristics (PBTL)
   9. 7.9 Typical Characteristics
      1. 7.9.1 BTL Configuration
      2. 7.9.2 SE Configuration
      3. 7.9.3 PBTL Configuration
8. 8 Parameter Measurement Information
9. 9 Detailed Description
   1. 9.1 Overview
   2. 9.2 Functional Block Diagrams
   3. 9.3 Feature Description
      1. 9.3.1 Error Reporting
   4. 9.4 Device Functional Modes
      1. 9.4.1 Device Protection System
         1. 9.4.1.1 Overload and Short Circuit Current Protection
         2. 9.4.1.2 Signal Clipping and Pulse Injector
         3. 9.4.1.3 DC Speaker Protection
         4. 9.4.1.4 Pin-to-Pin Short Circuit Protection (PPSC)
         5. 9.4.1.5 Overtemperature Protection OTW and OTE
         6. 9.4.1.6 Undervoltage Protection (UVP) and Power-on Reset (POR)
         7. 9.4.1.7 Fault Handling
         8. 9.4.1.8 Device Reset
10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
       1. 10.2.1 Stereo BTL Application
          1. 10.2.1.1 Design Requirements
          2. 10.2.1.2 Detailed Design Procedures
             1. 10.2.1.2.1 Decoupling Capacitor Recommendations
             2. 10.2.1.2.2 PVDD Capacitor Recommendation
             3. 10.2.1.2.3 PCB Material Recommendation
             4. 10.2.1.2.4 Oscillator
          3. 10.2.1.3 Application Curves
       2. 10.2.2 Typical Application, Single Ended (1N) SE
          1. 10.2.2.1 Design Requirements
          2. 10.2.2.2 Application Curves
       3. 10.2.3 Typical Application, Differential (2N), PBTL (Outputs Paralleled before LC filter)
          1. 10.2.3.1 Design Requirements
          2. 10.2.3.2 Application Curves
    3. 10.3 Typical Application, Differential (2N), PBTL (Outputs Paralleled after LC filter)
       1. 10.3.1 Design Requirements
       2. 10.3.2 Application Curves
11. 11Power Supply Recommendations
    1. 11.1 Power Supplies
       1. 11.1.1 VDD Supply
       2. 11.1.2 GVDD_X Supply
       3. 11.1.3 PVDD Supply
    2. 11.2 Powering Up
    3. 11.3 Powering Down
    4. 11.4 Thermal Design
       1. 11.4.1 Thermal Performance
       2. 11.4.2 Thermal Performance with Continuous Output Power
       3. 11.4.3 Thermal Performance with Non-Continuous Output Power
12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Examples
       1. 12.2.1 BTL Application Printed Circuit Board Layout Example
       2. 12.2.2 SE Application Printed Circuit Board Layout Example
       3. 12.2.3 PBTL (Outputs Paralleled before LC filter) Application Printed Circuit Board Layout Example
       4. 12.2.4 PBTL (Outputs Paralleled after LC filter) Application Printed Circuit Board Layout Example
13. 13デバイスおよびドキュメントのサポート
    1. 13.1 ドキュメントのサポート
    2. 13.2 ドキュメントの更新通知を受け取る方法
    3. 13.3 コミュニティ・リソース
    4. 13.4 商標
    5. 13.5 静電気放電に関する注意事項
    6. 13.6 Glossary
14. 14メカニカル、パッケージ、および注文情報