JAJSGU0A January   2019  – March 2019 TPA3255-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
      2.      全高調波歪み
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Audio Characteristics (BTL)
    7. 6.7  Audio Characteristics (SE)
    8. 6.8  Audio Characteristics (PBTL)
    9. 6.9  Typical Characteristics, BTL Configuration
    10. 6.10 Typical Characteristics, SE Configuration
    11. 6.11 Typical Characteristics, PBTL Configuration
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Error Reporting
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device Protection System
        1. 8.4.1.1 Overload and Short Circuit Current Protection
        2. 8.4.1.2 Signal Clipping and Pulse Injector
        3. 8.4.1.3 DC Speaker Protection
        4. 8.4.1.4 Pin-to-Pin Short Circuit Protection (PPSC)
        5. 8.4.1.5 Overtemperature Protection OTW and OTE
        6. 8.4.1.6 Undervoltage Protection (UVP) and Power-on Reset (POR)
        7. 8.4.1.7 Fault Handling
        8. 8.4.1.8 Device Reset
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Stereo BTL Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedures
          1. 9.2.1.2.1 Decoupling Capacitor Recommendations
          2. 9.2.1.2.2 PVDD Capacitor Recommendation
          3. 9.2.1.2.3 PCB Material Recommendation
          4. 9.2.1.2.4 Oscillator
      2. 9.2.2 Application Curves
      3. 9.2.3 Typical Application, Single Ended (1N) SE
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedures
        3. 9.2.3.3 Application Curves
      4. 9.2.4 Typical Application, Differential (2N) PBTL
        1. 9.2.4.1 Design Requirements
        2. 9.2.4.2 Detailed Design Procedures
        3. 9.2.4.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power Supplies
      1. 10.1.1 VDD Supply
      2. 10.1.2 GVDD_X Supply
      3. 10.1.3 PVDD Supply
    2. 10.2 Powering Up
    3. 10.3 Powering Down
    4. 10.4 Thermal Design
      1. 10.4.1 Thermal Performance
      2. 10.4.2 Thermal Performance with Continuous Output Power
      3. 10.4.3 Thermal Performance with Non-Continuous Output Power
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
      1. 11.2.1 BTL Application Printed Circuit Board Layout Example
      2. 11.2.2 SE Application Printed Circuit Board Layout Example
      3. 11.2.3 PBTL Application Printed Circuit Board Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
Supply voltage BST_X to GVDD_X(2)(3)(4) –0.3 69 V
VDD to GND –0.3 11.4 V
GVDD_X to GND(2)(3) –0.3 11.4 V
PVDD_X to GND(2)(3) –0.3 69 V
DVDD to GND –0.3 4.2 V
AVDD to GND –0.3 8.5 V
VBG to GND -0.3 4.2 V
Interface pins OUT_X to GND(2)(4) –0.3 69 V
BST_X to GND(2)(4) –0.3 81.5 V
OC_ADJ, M1, M2, OSC_IOP, OSC_IOM, FREQ_ADJ, C_START, to GND –0.3 4.2 V
RESET, FAULT, CLIP_OTW to GND –0.3 4.2 V
INPUT_X to GND –0.3 7 V
Continuous sink current, RESET, FAULT, CLIP_OTW to GND 9 mA
TA Operating ambient temperature -40 105 °C
Tstg Storage temperature range –40 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) These voltages represents the DC voltage + peak AC waveform measured at the terminal of the device in all conditions.
(3) GVDD_X and PVDD_X represent a full bridge gate drive or power supply. GVDD_X is GVDD_AB or GVDD_CD. PVDD_X is PVDD_AB or PVDD_CD
(4) OUT_X and BST_X represent a half bridge output node or bootstrap supply. OUT_X is OUT_A, OUT_B, OUT_C or OUT_D. BST_X is BST_A, BST_B, BST_C or BST_D.