JAJSIM3C March   2020  – May 2024 TPA6211T-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Operating Characteristics
    7. 5.7 Dissipation Ratings
    8.     Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Advantages of Fully Differential Amplifiers
      2. 6.3.2 Fully Differential Amplifier Efficiency and Thermal Information
      3. 6.3.3 Differential Output Versus Single-Ended Output
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Typical Differential Input Application
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 Resistors (RI)
          2. 7.2.1.2.2 Bypass Capacitor (CBYPASS) and Start-Up Time
          3. 7.2.1.2.3 Input Capacitor (CI)
          4. 7.2.1.2.4 Band-Pass Filter (RI, CI, and CF)
            1. 7.2.1.2.4.1 Step 1: Low-Pass Filter
            2. 7.2.1.2.4.2 Step 2: High-Pass Filter
            3. 7.2.1.2.4.3 Step 3: Additional Low-Pass Filter
          5. 7.2.1.2.5 Decoupling Capacitor (CS)
          6. 7.2.1.2.6 Using Low-ESR Capacitors
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Other Application Circuits
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 Power Supply Decoupling Capacitor
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Community Resources
    3. 8.3 Trademarks
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5.5 Electrical Characteristics

TA = 25°C unless otherwise noted
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOS Output offset voltage (measured differentially) VI = 0-V differential, Gain = 1 V/V, VDD = 5.5 V –9 0.3 9 mV
PSRR Power supply rejection ratio VDD = 2.5 V to 5.5 V –85 –60 dB
VIC Common mode input range VDD = 2.5 V to 5.5 V 0.5 VDD – 0.8 V
CMRR Common mode rejection ratio VDD = 5.5 V, VIC = 0.5 V to 4.7 V –63 –40 dB
VDD = 2.5 V, VIC = 0.5 V to 1.7 V –63 –40
Low-output swing RL = 4 Ω, VIN+ = VDD, VIN+ = 0 V,
Gain = 1 V/V, VIN– = 0 V or VIN– = VDD		 VDD = 5.5 V 0.45 V
VDD = 3.6 V 0.37
VDD = 2.5 V 0.26 0.4
Low-output swing (only for TPA6211HTDGNRQ1) RL = 4 Ω, VIN+ = VDD, VIN+ = 0 V,
Gain = 1 V/V, VIN– = 0 V or VIN– = VDD
TA = 105°C		 VDD = 2.5 V 0.46
High-output swing RL = 4 Ω, VIN+ = VDD, VIN– = VDD,
Gain = 1 V/V, VIN– = 0 V or VIN+ = 0 V		 VDD = 5.5 V 4.95 V
VDD = 3.6 V 3.18
VDD = 2.5 V 2 2.13
High-output swing (only for TPA6211HTDGNRQ1) RL = 4 Ω, VIN+ = VDD, VIN– = VDD,
Gain = 1 V/V, VIN– = 0 V or VIN+ = 0 V
TA = 105°C		 VDD = 2.5 V 1.95
| IIH | High-level input current, shutdown VDD = 5.5 V, VI = 5.8 V 58 100 µA
| IIH | High-level input current, shutdown (only for TPA6211HTDGNRQ1) VDD = 5.5 V, VI = 5.8 V
TA = 105°C		 115 µA
| IIL | Low-level input current, shutdown VDD = 5.5 V, VI = –0.3 V 3 100 µA
| IIL | Low-level input current, shutdown (only for TPA6211HTDGNRQ1) VDD = 5.5 V, VI = –0.3 V
TA = 105°C		 115 µA
IQ Quiescent current VDD = 2.5 V to 5.5 V, no load 4 5 mA
IQ Quiescent current (only for TPA6211HTDGNRQ1) VDD = 2.5 V to 5.5 V, no load
TA = 105°C		 5.7 mA
I(SD) Supply current VSHUTDOWN ≤ 0.5 V, VDD = 2.5 V to 5.5 V, RL = 4 Ω 0.01 1 µA
I(SD) Supply current (only for TPA6211HTDGNRQ1) VSHUTDOWN ≤ 0.5 V, VDD = 2.5 V to 5.5 V, RL = 4 Ω
TA = 105°C		 1.25 µA
Gain RL = 4 Ω TPA6211T-Q1 TPA6211T-Q1 TPA6211T-Q1 V/V
Gain (only for TPA6211HTDGNRQ1) RL = 4 Ω
TA = 105°C		 TPA6211T-Q1 V/V
Resistance from shutdown to GND 100 kΩ