SLVSBR1F January   2013  – January 2015 TPD4S214

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Simplified Schematic
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Thermal Shutdown
    6. 7.6  Electrical Characteristics for EN, FLT, DET, D+, D-, VBUS, ID Pins
    7. 7.7  Electrical characteristics for UVLO / OVLO
    8. 7.8  Electrical Characteristics for DET Circuits
    9. 7.9  Electrical Characteristics for OTG Switch
    10. 7.10 Electrical Characteristics for Current Limit and Short Circuit Protection
    11. 7.11 Supply Current Consumption
    12. 7.12 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Input Voltage Protection at VBUS from -7 V to 30 V
      2. 8.3.2  IEC 61000-4-2 Level 4 ESD Protection
      3. 8.3.3  Low RDS(ON) N-CH FET Switch for High Efficiency
      4. 8.3.4  Compliant with USB2.0 and USB3.0 OTG spec
      5. 8.3.5  User Adjustable Current Limit From 250 mA to Beyond 1.2 A
      6. 8.3.6  Built-in Soft-start
      7. 8.3.7  Reverse Current Blocking
      8. 8.3.8  Over Voltage Lock Out for VBUS
      9. 8.3.9  Under Voltage Lock Out for VOTG_IN
      10. 8.3.10 Thermal Shutdown and Short Circuit Protection
      11. 8.3.11 Auto Retry on any Fault; no Latching off States
      12. 8.3.12 Integrated VBUS Detection Circuit
      13. 8.3.13 Low Capacitance TVS ESD Clamp for USB2.0 High Speed Data Rate
      14. 8.3.14 Internal 16ms Startup Delay
      15. 8.3.15 Space Saving WCSP (12-YFF) Package
      16. 8.3.16 Inrush Current Protection
      17. 8.3.17 Input Capacitor (Optional)
      18. 8.3.18 Output Capacitor (Optional)
      19. 8.3.19 Current Limit
      20. 8.3.20 Thermal Shutdown
      21. 8.3.21 VBUS Detection
      22. 8.3.22 Test Configuration
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 USB 2.0 Without Using On-chip VBUS Detect
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 USB 2.0 Using On-chip VBUS Detect
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
      3. 9.2.3 USB 3.0 Without Using On-chip VBUS Detect
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
        3. 9.2.3.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

12 Device and Documentation Support

12.1 Documentation Support

12.1.1 Related Documentation

OTG and EH Supplement: On-The-Go and Embedded Host Supplement to the USB Revision 2.0 Specification, July 14th, 2011. www.usb.org

12.2 Trademarks

All other trademarks are the property of their respective owners.

12.3 Electrostatic Discharge Caution

esds-image

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

12.4 Glossary

SLYZ022TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.