SLLSE38B June   2010  – March 2016 TPD8E003

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 ESD Ratings - Surge Protection
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 IEC 61000-4-2 ESD Protection
      2. 7.3.2 IEC 61000-4-5 Surge Protection
      3. 7.3.3 IO Capacitance
      4. 7.3.4 DC Breakdown Voltage
      5. 7.3.5 Low Leakage Current
      6. 7.3.6 Industrial Temperature Range
      7. 7.3.7 Space-Saving Package
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Signal Range
        2. 8.2.2.2 Required ESD Protection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
IO voltage tolerance (IO pins) 6 V
Peak pulse power (tp = 8/20 µs) 55 W
Peak pulse current (tp = 8/20 µs) 3.5 A
TA Operating free-air temperature –40 85 ºC
Tstg Storage temperature –55 155 ºC
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 ESD Ratings – Surge Protection

VALUE UNIT
V(ESD) Electrostatic discharge IEC 61000-4-2 contact discharge ±12000 V
IEC 61000-4-2 air-gap discharge ±15000

6.4 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VIO Input pin voltage 0 5.5 V
TA Operating free-air temperature –40 85 °C

6.5 Thermal Information

THERMAL METRIC(1) TPD8E003 UNIT
DQD (WSON)
8 PINS
RθJA Junction-to-ambient thermal resistance 98.3 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 110.3 °C/W
RθJB Junction-to-board thermal resistance 42.5 °C/W
ψJT Junction-to-top characterization parameter 9.2 °C/W
ψJB Junction-to-board characterization parameter 42.2 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 22.0 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.6 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITION MIN TYP MAX UNIT
Vclamp Clamp voltage IIO = 2 A, IO pin-to-ground 10 V
II Leakage current IO pin-to-ground 0.1 μA
CIO IO capacitance VIO = 2.5 V, IO pins 7 9 12 pF
ΔCIO Differential line capacitance VIO = 2.5 V, between IO pins 0.1 pF
VBR Break-down voltage IIO = 1 mA 6 V
Rdyn Dynamic resistance IIO = 1 A, between IO pin and ground 1 Ω

6.7 Typical Characteristics

TPD8E003 g_capac_volt_llse38.gif Figure 1. IO Capacitance vs IO Voltage
TPD8E003 g_peakpulse_llse38.gif Figure 3. Peak Pulse Waveforms
TPD8E003 g_dcchars_llse38.gif Figure 2. DC Characteristics