JAJSFN2 June   2018 TPD8S300A

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     CCおよびSBUの過電圧保護
    2.     CCおよびDP/DMの過電圧保護
  4. 改訂履歴
  5. 概要(続き)
  6. Device Comparison Table
  7. Pin Configuration and Functions
    1.     Pin Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings—JEDEC Specification
    3. 8.3 ESD Ratings—IEC Specification
    4. 8.4 Recommended Operating Conditions
    5. 8.5 Thermal Information
    6. 8.6 Electrical Characteristics
    7. 8.7 Timing Requirements
    8. 8.8 Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 4-Channels of Short-to-VBUS Overvoltage Protection (CC1, CC2, SBU1, SBU2 Pins or CC1, CC2, DP, DM Pins): 24-VDC Tolerant
      2. 9.3.2 8-Channels of IEC 61000-4-2 ESD Protection (CC1, CC2, SBU1, SBU2, DP_T, DM_T, DP_B, DM_B Pins)
      3. 9.3.3 CC1, CC2 Overvoltage Protection FETs 600 mA Capable for Passing VCONN Power
      4. 9.3.4 CC Dead Battery Resistors Integrated for Handling the Dead Battery Use Case in Mobile Devices
      5. 9.3.5 Advantages over TPD8S300
        1. 9.3.5.1 Improved Dead Battery Performance
        2. 9.3.5.2 USB Type-C Port Stays Connected during an IEC 61000-4-2 ESD Strike
      6. 9.3.6 3-mm × 3-mm WQFN Package
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 VBIAS Capacitor Selection
        2. 10.2.2.2 Dead Battery Operation
        3. 10.2.2.3 CC Line Capacitance
        4. 10.2.2.4 Additional ESD Protection on CC and SBU Lines
        5. 10.2.2.5 FLT Pin Operation
        6. 10.2.2.6 How to Connect Unused Pins
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 ドキュメントのサポート
      1. 13.1.1 関連資料
    2. 13.2 ドキュメントの更新通知を受け取る方法
    3. 13.3 コミュニティ・リソース
    4. 13.4 商標
    5. 13.5 静電気放電に関する注意事項
    6. 13.6 Glossary
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

8-Channels of IEC 61000-4-2 ESD Protection (CC1, CC2, SBU1, SBU2, DP_T, DM_T, DP_B, DM_B Pins)

The TPD8S300A integrates 8-Channels of IEC 61000-4-2 system level ESD protection for the CC1, CC2, SBU1, SBU2, DP_T (Top side D+), DM_T (Top Side D–), DP_B (Bottom Side D+), and DM_B (Bottom Side D–) pins. USB Type-C ports on end-products need system level IEC ESD protection in order to provide adequate protection for the ESD events that the connector can be exposed to from end users. The TPD8S300A integrates IEC ESD protection for all of the low-speed pins on the USB Type-C connector in a single chip. Also note, that while the RPD_Gx pins are not individually rated for IEC ESD, when they are shorted to the C_CCx pins, the C_CCx pins provide protection for both the C_CCx pins and the RPD_Gx pins. Additionally, high-voltage IEC ESD protection that is 24-V DC tolerant is required for the CC and SBU lines in order to simultaneously support IEC ESD and Short-to-VBUS protection; there are not many discrete market solutions that can provide this kind of protection. The TPD8S300A integrates this type of high-voltage ESD protection so a system designer can meet both IEC ESD and Short-to-VBUS protection requirements in a single device.