JAJSFN2
June 2018
TPD8S300A
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
CCおよびSBUの過電圧保護
CCおよびDP/DMの過電圧保護
4
改訂履歴
5
概要(続き)
6
Device Comparison Table
7
Pin Configuration and Functions
Pin Functions
8
Specifications
8.1
Absolute Maximum Ratings
8.2
ESD Ratings—JEDEC Specification
8.3
ESD Ratings—IEC Specification
8.4
Recommended Operating Conditions
8.5
Thermal Information
8.6
Electrical Characteristics
8.7
Timing Requirements
8.8
Typical Characteristics
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
4-Channels of Short-to-VBUS Overvoltage Protection (CC1, CC2, SBU1, SBU2 Pins or CC1, CC2, DP, DM Pins): 24-VDC Tolerant
9.3.2
8-Channels of IEC 61000-4-2 ESD Protection (CC1, CC2, SBU1, SBU2, DP_T, DM_T, DP_B, DM_B Pins)
9.3.3
CC1, CC2 Overvoltage Protection FETs 600 mA Capable for Passing VCONN Power
9.3.4
CC Dead Battery Resistors Integrated for Handling the Dead Battery Use Case in Mobile Devices
9.3.5
Advantages over TPD8S300
9.3.5.1
Improved Dead Battery Performance
9.3.5.2
USB Type-C Port Stays Connected during an IEC 61000-4-2 ESD Strike
9.3.6
3-mm × 3-mm WQFN Package
9.4
Device Functional Modes
10
Application and Implementation
10.1
Application Information
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.2.1
VBIAS Capacitor Selection
10.2.2.2
Dead Battery Operation
10.2.2.3
CC Line Capacitance
10.2.2.4
Additional ESD Protection on CC and SBU Lines
10.2.2.5
FLT Pin Operation
10.2.2.6
How to Connect Unused Pins
10.2.3
Application Curves
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.2
Layout Example
13
デバイスおよびドキュメントのサポート
13.1
ドキュメントのサポート
13.1.1
関連資料
13.2
ドキュメントの更新通知を受け取る方法
13.3
コミュニティ・リソース
13.4
商標
13.5
静電気放電に関する注意事項
13.6
Glossary
14
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RUK|20
MPQF220D
サーマルパッド・メカニカル・データ
RUK|20
QFND191D
発注情報
jajsfn2_oa
jajsfn2_pm
10.2.2
Detailed Design Procedure