11.1 Layout Guidelines

There is no special layout requirement for the digital signal pin; the only requirement is placing the ceramic bypass capacitors near the corresponding pin. Because the TPIC6C595 device does not have a thermal shutdown protection function, to prevent thermal damage, T_J must be less than 150°C. If the total sink current is high, the power dissipation might be large. The devices are currently not available in the thermal pad package, so good PCB design can optimize heat transfer, which is absolutely essential for the long-term reliability of the device.

Maximize the copper coverage on the PCB to increase the thermal conductivity of the board, because the major heat-flow path from the package to the ambient is through the copper on the PCB. Maximum copper is extremely important when the design does not include heat sinks attached to the PCB on the other side of the package.

• Add as many thermal vias as possible directly under the package ground pad to optimize the thermal conductivity of the board.
• All thermal vias should be either plated shut or plugged and capped on both sides of the board to prevent solder voids. To ensure reliability and performance, the solder coverage should be at least 85%.

11.2 Layout Example

Figure 16. TPIC6C595 Recommended Layout

11.3 Thermal Considerations

A. Device (D package) mounted on FR4 printed-circuit board with no heat sink

B. Z_θA(t) = r(t) R_θJA

C. t_w = pulse duration

D. t_c = cycle time

E. d = duty cycle = t_w / t_c

Figure 17. D Package, Normalized Junction-to-Ambient Thermal Resistance vs Pulse Duration