SLIS061D July 1998 – September 2015 TPIC6C595
PRODUCTION DATA.
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MIN | MAX | UNIT | ||
---|---|---|---|---|
VCC | Logic supply voltage(2) | –0.3 | 7 | V |
VI | Logic input voltage | –0.3 | 7 | V |
VDS | Power DMOS drain-to-source voltage(3) | –0.3 | 33 | V |
Continuous source-to-drain diode anode current | 0 | 250 | mA | |
Pulsed source-to-drain diode anode current(4) | 0 | 500 | mA | |
ID | Pulsed drain current, each output, all outputs on, TC = 25°C(4) | 0 | 250 | mA |
ID | Continuous drain current, each output, all outputs on, TC = 25°C(4) | 0 | 100 | mA |
IDM | Peak drain current single output, TC = 25°C(4) | 0 | 250 | mA |
EAS | Single-pulse avalanche energy (see Figure 11) | 0 | 30 | mJ |
IAS | Avalanche current(5) | 0 | 200 | mA |
Continuous total dissipation | See Thermal Information | |||
TJ | Operating virtual junction temperature | –40 | 150 | °C |
TC | Operating case temperature | –40 | 125 | °C |
Tstg | Storage temperature | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per AEC Q100-002(1) | ±2500 | V |
Charged-device model (CDM), per AEC Q100-011 | ±200 |
MIN | MAX | UNIT | ||
---|---|---|---|---|
VCC | Logic supply voltage | 4.5 | 5.5 | V |
VIH | High-level input voltage | 0.85 VCC | V | |
VIL | Low-level input voltage | 0.15 VCC | V | |
Pulsed drain output current, TC = 25°C, VCC = 5 V, all outputs on(1) (2)(see Figure 7) | 250 | mA | ||
tsu | Setup time, SER IN high before SRCK↑ (see Figure 9) | 20 | ns | |
th | Hold time, SER IN high after SRCK↑, (see Figure 9) | 20 | ns | |
tw | Pulse duration (see Figure 9) | 40 | ns | |
TC | Operating case temperature | –40 | 125 | °C |
THERMAL METRIC(1) | TPIC6C595 | UNIT | |||
---|---|---|---|---|---|
D (SOIC) | N (PDIP) | PW (TSSOP) | |||
16 PINS | 16 PINS | 16 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 82.3 | 51.5 | 109.7 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 39.7 | 31.4 | 44.6 | °C/W |
RθJB | Junction-to-board thermal resistance | 41.4 | 38.8 | 54.8 | °C/W |
ψJT | Junction-to-top characterization parameter | 11.3 | 23.6 | 5 | °C/W |
ψJB | Junction-to-board characterization parameter | 39.5 | 31.3 | 54.2 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | N/A | N/A | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
V(BR)DSX | Drain-to-source breakdown voltage | ID = 1 mA | 33 | 37 | V | ||
VSD | Source-to-drain diode forward voltage | IF = 100 mA | 0.85 | 1.2 | V | ||
VOH | High-level output voltage, SER OUT | IOH = − 20 µA, | VCC = 4.5 V | 4.4 | 4.49 | V | |
IOH = − 4 mA, | VCC = 4.5 V | 4 | 4.2 | ||||
VOL | Low-level output voltage, SER OUT | IOL = 20 µA, | VCC = 4.5 V | 0.005 | 0.1 | V | |
IOL = 4 mA, | VCC = 4.5 V | 0.3 | 0.5 | ||||
IIH | High-level input current | VCC = 5.5 V, | VI = VCC | 1 | µA | ||
IIL | Low-level input current | VCC = 5.5 V, | VI = 0 | –1 | µA | ||
ICC | Logic supply current | VCC = 5.5 V | All outputs off | 20 | 200 | µA | |
All outputs on | 150 | 500 | |||||
ICC(FRQ) | Logic supply current at frequency | fSRCK = 5 MHz, All outputs off, |
CL = 30 pF, See Figure 9 and Figure 2 |
1.2 | 5 | mA | |
IN | Nominal current | VDS(on) = 0.5 V, TC = 85°C |
IN = ID, See (1)(2)(3) |
90 | mA | ||
IDSX | Off-state drain current | VDS = 30 V, | VCC = 5.5 V | 0.1 | 0.2 | µA | |
VDS = 30 V TC = 125°C |
VCC = 5.5 V |
0.15 | 0.3 | ||||
rDS(on) | Static drain-source on-state resistance | ID = 50 mA, VCC = 4.5 V |
See (1) and(2) and Figure 3 and Figure 4 | 6.5 | 9 | Ω | |
ID = 50 mA, TC = 125°C, VCC = 4.5 V |
9.9 | 12 | |||||
ID = 100 mA, VCC = 4.5 V |
6.8 | 10 |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
tPLH | Propagation delay time, low-to-high-level output from G | CL = 30 pF, ID = 75 mA, See Figure 8, Figure 9 and Figure 5 | 80 | ns | ||
tPHL | Propagation delay time, high-to-low-level output from G | 50 | ns | |||
tpd | Propagation delay time, SRCK↓ to SEROUT | 15 | ns | |||
tr | Rise time, drain output | 100 | ns | |||
tf | Fall time, drain output | 80 | ns | |||
ta | Reverse-recovery-current rise time | IF = 100 mA, di/dt = 10 A/µs(1) (2), See Figure 10 |
100 | ns | ||
trr | Reverse-recovery time | 120 |
Technique should limit TJ − TC to 10°C maximum. |
Technique should limit TJ − TC to 10°C maximum |
Technique should limit TJ − TC to 10°C maximum |