SLIS093D March   2000  – March 2015 TPIC6C596

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Serial-In Interface
      2. 8.3.2 Clear Register
      3. 8.3.3 Output Control
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation With V(VIN) < 4.5 V (Minimum V(VIN))
      2. 8.4.2 Operating With 5.5 V < V(VIN) < 6 V
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Cascaded Application
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 R1, R2, R3, R4, R5, R6, R7, R8 R1 = R2 = R3 = R4 = R5 = R6 = R7 = R8 = (Vsupply - V (Dx)) / I (Dx) = (12 V - 2 V) / 0.02 A = 500 Ω
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • PW|16
  • N|16
  • D|16
サーマルパッド・メカニカル・データ
発注情報

8 Detailed Description

8.1 Overview

The TPIC6C596 device is a monolithic, medium-voltage, low-current 8-bit shift register designed to drive relatively moderate load power such as LEDs. The device contains a built-in voltage clamp on the outputs for inductive transient protection, so it can also drive relays, solenoids, and other low-current or medium-voltage loads.

8.2 Functional Block Diagram

TPIC6C596 logic_diagram_slis093.gifFigure 12. Logic Diagram (Positive Logic)

8.3 Feature Description

8.3.1 Serial-In Interface

The TPIC6C596 device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Data transfers through both the shift and storage registers on the rising edge of the shift register clock (SRCK) and the register clock (RCK), respectively. The storage register transfers data to the output buffer when shift register clear (CLR) is high.

8.3.2 Clear Register

A logical low on CLR clears all registers in the device. TI suggests clearing the device during power up or initialization.

8.3.3 Output Control

Holding the output enable (G) high holds all data in the output buffers low, and all drain outputs are off. Holding G low makes data from the storage register transparent to the output buffers. When data in the output buffers is low, the DMOS transistor outputs are off. When data is high, the DMOS transistor outputs are capable of sink-current. This pin can also be used for global PWM dimming.

8.4 Device Functional Modes

8.4.1 Operation With V(VIN) < 4.5 V (Minimum V(VIN))

This device works normally during 4.5 V ≤ V(VIN) ≤ 5.5 V, when operation voltage is lower than 4.5 V. The behavior of device can't be ensured, including communication interface and current capability.

8.4.2 Operating With 5.5 V < V(VIN) < 6 V

This device works normally during this voltage range, but reliability issues may occurs while the device works for a long time in this voltage range.