SLIS140A October   2011  – December 2014 TPIC74101-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Dissipation Rating
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Switch-Mode Input/Output Pins (L1, L2)
      2. 7.3.2  Supply Pin (Vdriver)
      3. 7.3.3  Internal Supply Decoupling Pin (Vlogic)
      4. 7.3.4  Input Voltage Monitoring Pin (AIN)
      5. 7.3.5  Input Undervoltage Alarm Pin (AOUT)
      6. 7.3.6  Reset Delay Timer Pin (REST)
      7. 7.3.7  Reset Pin (RESET)
      8. 7.3.8  Main Regulator Output Pin (VOUT)
      9. 7.3.9  Low-Power-Mode Pin (CLP)
      10. 7.3.10 Switch-Output Pin (5Vg)
      11. 7.3.11 5Vg-Enable Pin (5Vg_ENABLE)
      12. 7.3.12 Slew-Rate Control Pins (SCR0, SCR1)
      13. 7.3.13 Modulator Frequency Setting (Pin Rmod)
      14. 7.3.14 Ground Pin (PGND)
      15. 7.3.15 Enable Pin (ENABLE)
      16. 7.3.16 Bootstrap Pins (Cboot1 and Cboot2)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Clock Modulator
      2. 7.4.2 Buck/Boost Transitioning
      3. 7.4.3 Buck SMPS
      4. 7.4.4 Boost SMPS
      5. 7.4.5 Extension of the Input Voltage Range on V(driver)
      6. 7.4.6 Low-Power Mode
      7. 7.4.7 Temperature and Short-Circuit Protection
      8. 7.4.8 Switch Output Pin (5Vg) Current Limitation
      9. 7.4.9 Soft Start
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Buck Mode
        2. 8.2.2.2 Boost Mode
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Switch-Mode Power Supply
        1. 10.1.1.1 Inductor
        2. 10.1.1.2 Filter Capacitors
        3. 10.1.1.3 Traces and Ground Plane
      2. 10.1.2 Package and PCB Land Configuration for a Multilayer PCB
      3. 10.1.3 Multilayer (Side View)
      4. 10.1.4 Single-Layer
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Trademarks
    2. 11.2 Electrostatic Discharge Caution
    3. 11.3 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The TPIC74100-Q1 is a switch-mode regulator with integrated switches for voltage-mode control. With the help of external LC components, the device regulates the output to 5V +-2% for a wide input voltage range. The device can monitor the output voltage as well as the input voltage.

8.2 Typical Application

s0183-01.gif
A. To minimize voltage ripple on the output due to transients, it is recommended to use a low-ESR capacitor on the VOUT line.
B. The L and C component values are system application dependent for EMI consideration.
Figure 20. Application Schematic

8.2.1 Design Requirements

Plot the converter efficiency with four different slew rate controls (SCRx) at an input voltage of 11 V and 17 V. The slew rate of the switching transistor Q1 can be changed using the SCR0 and SCR1 pins.

8.2.2 Detailed Design Procedure

8.2.2.1 Buck Mode

  • Select inductor ripple current ΔIL: for example ΔIL = 0.2 × IOUT
  • Calculate inductor L
    • Equation 3. eq01_slis125.gif

    where fSW is the regulator switching frequency.

  • Inductor peak current
    • Equation 4. eq02_slis125.gif
  • Output voltage ripple
    • Equation 5. eq03_slis125.gif

    Usually, the first term is dominant.

    Equation 6. eq04_slis125.gif

8.2.2.2 Boost Mode

  • Select inductor ripple current ΔIL: for example ΔIL = 0.2 × IIN
  • Calculate inductor L
    • Equation 7. eq05_slis125.gif

    where fSW is the regulator switching frequency.

  • Inductor peak current
    • Equation 8. eq06_slis125.gif
  • Output voltage ripple
    • Equation 9. eq07_slis125.gif

8.2.3 Application Curves

slis122_g004.gif
The average converter efficiency with four different slew rate controls (SCRx) on the Q1 switching FET with input voltage V(driver) = 11 V and 17 V, TA = 125°C.
Figure 21. Converter Efficiency