SLIS134C March   2011  – September 2015

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Operating Characteristics
    7. 6.7 Timing Requirements
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Voltage Divider Mode
      3. 7.4.3 Rheostat Mode
    5. 7.5 Programming with I2C
      1. 7.5.1 I2C General Operation
        1. 7.5.1.1 I2C Interface
        2. 7.5.1.2 START and STOP Conditions
        3. 7.5.1.3 Data Validity and Byte Formation
        4. 7.5.1.4 Acknowledge (ACK) and Not Acknowledge (NACK)
      2. 7.5.2 I2C Write and Read Operation
        1. 7.5.2.1 Auto Increment Function
        2. 7.5.2.2 Write Operation
        3. 7.5.2.3 Repeated Start
        4. 7.5.2.4 Read Operation
    6. 7.6 Register Maps
      1. 7.6.1 Slave Address
      2. 7.6.2 TPL0102 Register Map
      3. 7.6.3 IVRA (Initial Value Register for Potentiometer A)
      4. 7.6.4 WRA (Wiper Resistance Register for Potentiometer A)
      5. 7.6.5 IVRB (Initial Value Register for Potentiometer B)
      6. 7.6.6 WRB (Wiper Resistance Register for Potentiometer B)
      7. 7.6.7 ACR (Access Control Register)
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Adjustable Gain Non-Inverting Amplifier
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Digital to Analog Converter (DAC)
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
      3. 8.2.3 Variable Current Sink
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
          1. 8.2.3.2.1 Compensation Components
        3. 8.2.3.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Power Sequence
    2. 9.2 Wiper Position Upon Power Up
    3. 9.3 Dual-Supply vs Single-Supply
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9 Power Supply Recommendations

9.1 Power Sequence

Protection diodes limit the voltage compliance at terminal H, terminal L, and terminal W, making it important to power up VDD first before applying any voltage to terminal H, terminal L, and terminal W. The diodes are forward-biasing, meaning VDD can be powered unintentionally if VDD is not powered first. The ideal power-up sequence is VSS, VDD, VLOGIC, digital inputs, and VH, VL, and VW. The order of powering digital inputs, VH, VL, and VW does not matter as long as they are powered after VSS, VDD, and VLOGIC.

9.2 Wiper Position Upon Power Up

It is prudent to know that when the DPOT is powered off, the impedance of the device is not known. Upon power up, the device will go to 0x80h code for a very short period of time while it loads the stored wiper position in the EEPROM and then will go to the stored position. This happens in less than 100 uS.

9.3 Dual-Supply vs Single-Supply

Dual-supply operation allows the TPL0102 to handle voltage that may swing negative. This is especially useful for any application that involves negative voltages, such as the input to an Op Amp or audio signals. It is recommended that VSS (negative supply) is mirrored with VDD (positive supply) and both are centered around GND. For example, if dual-supply is desired and VDD = 2.50 V, then VSS should be equal to -2.50 V, which will result in GND centered between VDD and VSS.

Single-supply operation allows the TPL0102 to handle positive voltages only. In single-supply, it is recommended that VSS is tied to GND.