JAJSOQ1
October 2023
TPS1210-Q1
ADVANCE INFORMATION
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Device Comparison
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Switching Characteristics
8
Parameter Measurement Information
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
Charge Pump and Gate Driver Output (VS, G1PU, G1PD, G2, BST, SRC)
9.3.2
Capacitive Load Driving Using FET Gate (G1PU, G1PD) Slew Rate Control
9.3.3
Short-Circuit Protection
9.3.3.1
Short-Circuit Protection With Auto-Retry
9.3.3.2
Short-Circuit Protection With Latch-Off
9.3.4
Undervoltage Protection (UVLO)
9.3.5
Reverse Polarity Protection
9.3.6
Short-Circuit Protection Diagnosis (SCP_TEST)
9.3.7
TPS1210x-Q1 as a Simple Gate Driver
9.4
Device Functional Modes
10
Application and Implementation
10.1
Application Information
10.1.1
Application Limitations
10.1.1.1
Short-Circuit Protection Delay
10.1.1.2
Short-Circuit Protection Threshold
10.2
Typical Application: Circuit Breaker in Battery Management System (BMS) using Low Side Current Sense
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.3
Application Curves
10.3
Power Supply Recommendations
10.4
Layout
10.4.1
Layout Guidelines
10.4.2
Layout Example
11
Device and Documentation Support
11.1
ドキュメントの更新通知を受け取る方法
11.2
サポート・リソース
11.3
Trademarks
11.4
静電気放電に関する注意事項
11.5
用語集
12
Mechanical, Packaging, and Orderable Information
12.1
Tape and Reel Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DGX|19
MPSS147
サーマルパッド・メカニカル・データ
発注情報
jajsoq1_oa
9.2
Functional Block Diagram