JAJSGA8F september   2018  – february 2023 TPS1663

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Hot Plug-In and In-Rush Current Control
        1. 9.3.1.1 Thermal Regulation Loop
      2. 9.3.2  Undervoltage Lockout (UVLO)
      3. 9.3.3  Overvoltage Protection (OVP)
      4. 9.3.4  Overload and Short Circuit Protection
        1. 9.3.4.1 Overload Protection
        2. 9.3.4.2 Short Circuit Protection
          1. 9.3.4.2.1 Start-Up With Short-Circuit On Output
      5. 9.3.5  Output Power Limiting, PLIM (TPS16632 Only)
      6. 9.3.6  Current Monitoring Output (IMON)
      7. 9.3.7  FAULT Response (FLT)
      8. 9.3.8  Power Good Output (PGOOD)
      9. 9.3.9  IN, P_IN, OUT and GND Pins
      10. 9.3.10 Thermal Shutdown
      11. 9.3.11 Low Current Shutdown Control (SHDN)
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Programming the Current-Limit Threshold R(ILIM) Selection
        2. 10.2.2.2 Undervoltage Lockout and Overvoltage Set Point
        3. 10.2.2.3 Setting Output Voltage Ramp Time (tdVdT)
          1. 10.2.2.3.1 Support Component Selections RPGOOD and C(IN)
      3. 10.2.3 Application Curves
    3. 10.3 System Examples
      1. 10.3.1 Simple 24-V Power Supply Path Protection
    4. 10.4 Power Supply Recommendations
      1. 10.4.1 Transient Protection
    5. 10.5 Layout
      1. 10.5.1 Layout Guidelines
      2. 10.5.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  12. 12Mechanical, Packaging, and Orderable Information

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • RGE|24
  • PWP|20
サーマルパッド・メカニカル・データ

7.5 Electrical Characteristics

–40°C ≤ TA = TJ ≤ +125°C, 4.5 V < V(IN) = V(P_IN) < 60 V, V( SHDN) = 2 V, R(ILIM) = 30 kΩ, IMON = PGOOD =  FLT = OPEN, C(OUT) = 1 μF, C(dVdT) = OPEN. (All voltages referenced to GND, (unless otherwise noted))
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
SUPPLY VOLTAGE
V(IN), V(P_IN)Operating input voltage4.560V
IQ(ON)Supply currentEnabled: V( SHDN) = 2 V1.381.7mA
IQ(OFF)V( SHDN) = 0 V2160µA
V(OVC)Over voltage clampTPS16632 only, V(IN) > 40 V, I(OUT) = 1 mA35.736.639V
UNDERVOLTAGE LOCKOUT (UVLO) INPUT
V(UVLOR)UVLO threshold voltage, rising1.1761.21.224V
V(UVLOF)UVLO threshold voltage, falling1.091.1221.15V
I(UVLO)UVLO Input leakage current0 V ≤ V(UVLO) ≤ 60 V–1508150nA
OVERVOLTAGE PROTECTION (OVP) INPUT
V(OVPR)over-voltage threshold voltage, rising1.1761.21.224V
V(OVPF)over-voltage threshold voltage, falling1.091.1221.15V
I(OVP)OVP Input leakage current0 V ≤ V(OVP) ≤ 4 V–1500150nA
CURRENT LIMIT PROGRAMMING (ILIM)
I(OL)Over Load current limitR(ILIM) = 30 kΩ, V(IN) – V(OUT) = 1 V0.540.60.66A
R(ILIM) = 9 kΩ, V(IN) – V(OUT) = 1 V1.8422.16A
R(ILIM) = 4.02 kΩ, V(IN) – V(OUT) = 1 V4.1854.54.815A
R(ILIM) = 3 kΩ, V(IN) – V(OUT) = 1 V5.5866.42A
I(FASTRIP)Fast-trip comparator threshold2xI(OL)A
I(SCP)Short Circuit Protect current45A
OUTPUT POWER LIMITING CONTROL (PLIM) INPUT – TPS16632 ONLY
V(SEL_PLIM)Power Limit Feature select threshold180210240mV
I(PLIM)PLIM sourcing currentV(PLIM) = 0 V4.45.025.6µA
P(PLIM)Max Output powerR(PLIM) = 100 kΩ94100106W
R(PLIM) = 150 kΩ  (1)141.9151160.1W
PASS FET OUTPUT (OUT)
RONIN to OUT total ON resistance0.6 A ≤ I(OUT) ≤ 6 A,TJ = 25°C2630.4434.5mΩ
RONIN to OUT total ON resistance0.6 A ≤ I(OUT) ≤ 6 A,TJ = 85°C3345mΩ
RONIN to OUT total ON resistance0.6 A ≤ I(OUT) ≤ 6 A, –40°C ≤ TJ ≤ +125°C1930.4453mΩ
OUTPUT RAMP CONTROL (dVdT)
I(dVdT)dVdT charging currentV(dVdT) = 0 V1.77522.225µA
GAIN(dVdT)dVdT to OUT gainV(OUT) /V(dVdT)23.52526V/V
V(dVdTmax)dVdT maximum capacitor voltage3.84.174.75V
R(dVdT)dVdT discharging resistance1016.626.6Ω
CURRENT MONITOR OUTPUT (IMON)
GAIN(IMON)Gain factor I(IMON):I(OUT)0.6 A ≤ I(OUT) < 2 A25.6627.930.14µA/A
2 A ≤ I(OUT) ≤ 6 A26.2227.929.58µA/A
LOW IQ SHUTDOWN ( SHDN) INPUT
V( SHDN)Open circuit voltageI( SHDN) = 0.1 µA2.482.73.3V
V(SHUTF)SHDN threshold voltage for low IQ shutdown, falling0.8V
V(SHUTR)SHDN threshold rising2V
I( SHDN)Leakage currentV( SHDN) = 0 V–10µA
FAULT FLAG ( FLT): ACTIVE LOW
R( FLT)FLT Pull-down resistance3670130Ω
I( FLT)FLT Input leakage current0 V ≤ V( FLT) ≤ 60 V–1506150nA
POWER GOOD (PGOOD)
R(PGOOD)PGOOD Pull-down resistance3670130Ω
I(PGOOD)PGOOD Input leakage current0 V ≤ V(PGOOD) ≤ 60 V–1506150nA
THERMAL PROTECTION
T(J_REG)Thermal regulation set point136145154°C
T(TSD)Thermal shutdown (TSD) threshold, rising165°C
T(TSDhyst)TSD hysteresis11°C
MODE
MODE_SELMode selectionMODE = OpenLatch
MODE = Short to GNDAuto – Retry
(1) Parameter specified by design and characterization, not tested in production