JAJSHH4B may 2019 – february 2023 TPS1HB16-Q1
PRODUCTION DATA
When the device receives a rising edge on the EN pulse the output will turn on. After the turn-on delay time, the device VOUT goes to the VBB supply and begins outputting the steady state resistive current.
When the device turns off on a falling edge of EN, the channel IOUT will go to zero and the VOUT will drop to zero as well as shown.
When there is a load step, the SNS current output will follow the load current with a slight delay. The image shows the output current temporarily increase from 1 A to 5 A and then return to 1 A. In this situation, the output current is accurately modeled throughout the pulse by the voltage on the SNS pin allowing for accurate diagnostics.
If the device has a no-load case due to an open load or cable, the device will register the fault even in an off-state if the DIAG_EN pin is high. Figure 10-7 shows the device behavior when an open load event is registered with EN low and DIAG_EN is raised. Systems can PWM DIAG_EN to lower system power losses while still watching for open load events and the same timing applies.
If the output of the TPS1HB16-Q1 is short-circuited, the device will protect the system from failure. Depending on the device version and RILIM, the current limit set-point will vary. The waveforms below show examples of the current limit behavior when the device is enabled into a short circuit with a test setup according to AEC-Q100-012. In each case, the RILIM pin has a 5 kΩ resistor to set the current limit.