JAJSN87A July   2022  – December 2022 TPS1HC30-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 推奨動作条件
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 SNS Timing Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Accurate Current Sense
      2. 8.3.2 Programmable Current Limit
        1. 8.3.2.1 Capacitive Charging
      3. 8.3.3 Inductive-Load Switching-Off Clamp
      4. 8.3.4 Full Protections and Diagnostics
        1. 8.3.4.1  Short-Circuit and Overload Protection
        2. 8.3.4.2  Open-Load and Short-to-Battery Detection
        3. 8.3.4.3  Short-to-Battery Detection
        4. 8.3.4.4  Reverse-Polarity and Battery Protection
        5. 8.3.4.5  Latch-Off Mode
        6. 8.3.4.6  Thermal Protection Behavior
        7. 8.3.4.7  UVLO Protection
        8. 8.3.4.8  Loss of GND Protection
        9. 8.3.4.9  Loss of Power Supply Protection
        10. 8.3.4.10 Reverse Current Protection
        11. 8.3.4.11 Protection for MCU I/Os
      5. 8.3.5 Diagnostic Enable Function
    4. 8.4 Device Functional Modes
      1. 8.4.1 Working Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Dynamically Changing Current Limit
        2. 9.2.2.2 EMC Transient Disturbances Test
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
        1. 9.4.2.1 Without a GND Network
        2. 9.4.2.2 With a GND Network
      3. 9.4.3 Thermal Considerations
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.4 Full Protections and Diagnostics

#GUID-81F6EE4D-FBF2-430C-8783-1A14D4025BD4/TABLE_ISV_CCY_D5B is when DIAG_EN is enabled. When DIAG_EN is low, current sense and FLT are disabled. The output is in high-impedance mode. For details, refer to the following table.

Table 8-1 Diagnostic Enable Logic Table
DIAG_EN IN Condition Protections and Diagnostics
HIGH ON See Fault Table
OFF
LOW ON Diagnostics disabled, protection normal
SNS and FLT are high impedance
OFF

Table 8-2 Fault Table

Conditions

EN

VOUT

Latch

FLT

SNS

Behavior

Recovery

Normal

L

L

x

Hi-Z

0

Normal

H

ILOAD × RON

x

Hi-Z

ILoad / Ksns

Normal

Overcurrent

H

VBB – ILIM × RLOAD

x

L

VSNSFH

Holds the current at the current limit until thermal shutdown or when the overcurrent event is removed

STG, Relative Thermal Shutdown, Absolute Thermal Shutdown

H

H/L

L

L

VSNSFH

Shuts down when devices hits relative or absolute thermal shutdown

Auto retries when THYSis met and it has been longer than tRETRY amount of time

H

H/L

H

L

VSNSFH

Shuts down when devices hits relative or absolute thermal shutdown

Stays off until latch or enable is toggled

Open load, STB

H

H

x

Hi-Z

ILoad / KSNS = ~0

Normal behavior, user can judge through the SNS pin output if it is an open load or not

L

H

x

L

VSNSFH

Internal pullup resistor is active. If VBB – VOUT < VOL then fault active.

Clears when fault goes away

Reverse Polarity

x

x

x

x

x

Channel turns on to lower power dissipation. Current into ground pin is limited by external ground network.

Table 8-3 Deglitch Time for Each Fault Condition

Fault Condition

Deglitch Time

ILIM

2.5 µs

TREL

2.5 µs

TABS

20 µs

Open Load

500 µs