SLVSCJ7B March   2014  – July 2015 TPS22969

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics, VBIAS = 5.0 V
    6. 6.6 Electrical Characteristics, VBIAS = 2.5 V
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 On/off Control
      2. 7.3.2 Input Capacitor (CIN)
      3. 7.3.3 Output Capacitor (CL)
      4. 7.3.4 VIN and VBIAS Voltage Range
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 VIN to VOUT Voltage Drop
        2. 8.2.2.2 Inrush Current
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

DNY PACKAGE
8 PIN WSON
TPS22969 po_slvsci4.gif

Pin Functions

Pin I/O DESCRIPTION
NAME NO.
VIN 1, 2 I Switch input. Place ceramic bypass capacitor(s) between this pin and GND. See the Detailed Description section for more information.
VIN Exposed thermal Pad I Switch input. Place ceramic bypass capacitor(s) between this pin and GND. See the Detailed Description section for more information.
VBIAS 3 I Bias voltage. Power supply to the device.
ON 4 I Active high switch control input. Do not leave floating.
GND 5 – Ground.
VOUT 6, 7, 8 O Switch output. Place ceramic bypass capacitor(s) between this pin and GND. See the Detailed Description section for more information.