TPS2379 IEEE 802.3at PoE High-Power PD Interface With External Gate Driver
1 Features
- IEEE 802.3at Type-2 Hardware Classification With Status Flag
- Auxiliary Gate Driver for High-Power Expansion
- Robust 100-V, 0.5-Ω Hotswap MOSFET
- 1A (Typical) Operating Current Limit
- 140 mA (Typical) Inrush Current Limit
- DC-DC Converter Enable
- 15 kV/8 kV System-level ESD Capability
- PowerPAD™ HSOP Package
2 Applications
- IEEE 802.3at-compliant Devices
- Universal Power Over Ethernet (UPOE) Compliant Devices
- Video and VoIP Telephones
- Multiband Access Points
- Security Cameras
- Pico-Base Stations
3 Description
The TPS2379 device is an 8-pin integrated circuit that contains all of the features needed to implement an IEEE802.3at type-2 powered device (PD) such as Detection, Classification, Type 2 Hardware Classification, and 140-mA inrush current limit during startup. The low 0.5-Ω internal switch resistance, combined with the enhanced thermal dissipation of the PowerPAD package, enables this controller to continuously handle up to 0.85 A. The TPS2379 integrates a low 0.5-Ω internal switch to allow for up to 0.85 A of continuous current through the PD during normal operation. The TPS2379 device supports higher-power applications through an external pass transistor. The TPS2379 contains several protection features such as thermal shutdown, current limit foldback, and a robust 100-V internal switch.
Device Information(1)
| PART NUMBER | PACKAGE | BODY SIZE (NOM) |
|---|---|---|
| TPS2379 | HSOP (8) | 4.89 mm × 3.90 mm |
- For all available packages, see the orderable addendum at the end of the data sheet.
Typical Application Circuit
4 Revision History
Changes from * Revision (March 2012) to A Revision
- Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go
- Deleted Classification Resistor, RCLS section.Go
- Deleted CDB Pin Interface sectionGo
- Deleted GATE Pin Interface section Go
- Deleted External Boost Circuit (Q1, Q2, and RBLST) Considerations sectionGo
- Deleted T2P Pin Interface Go
- Deleted Detailed Pin Descriptions section Go
5 Pin Configuration and Functions
Pin Functions
| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| VDD | 1 | I | Connect to positive PoE input power rail. Bypass with 0.1 µF to VSS. |
| DEN | 2 | I/O | Connect 24.9 kΩ to VDD for detection. Pull to VSS disable pass MOSFET. |
| CLS | 3 | O | Connect resistor from CLS to VSS to program classification current. |
| VSS | 4 | — | Connect to negative power rail derived from PoE source. |
| RTN | 5 | O | Drain of PoE pass MOSFET. |
| CDB | 6 | O | Opendrain converter disable output, active low, referenced to RTN. |
| T2P | 7 | O | Active low indicates type 2 PSE connected. |
| GATE | 8 | O | Auxiliary gate driver output. |
| PowerPAD | — | — | The PowerPAD must be connected to VSS. A large fill area is required to assist in heat dissipation. |
