JAJSC25I
March 2014 – July 2019
TPS23861
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
Device Images
概略回路図
4
改訂履歴
5
概要(続き)
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Switching Characteristics
7.8
Typical Characteristics
8
Detailed Description
8.1
Overview
8.1.1
Detailed Pin Description
8.1.2
I2C Detailed Pin Description
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Detection Resistance Measurement
8.3.2
Physical Layer Classification
8.3.3
Class and Detect Fields
8.3.4
Register State Following a Fault
8.3.5
Disconnect
8.3.6
Disconnect Threshold
8.3.7
Fast Shutdown Mode
8.3.8
Legacy Device Detection
8.3.9
VPWR Undervoltage and UVLO Events
8.3.10
Timer-Deferrable Interrupt Support
8.3.11
A/D Converter and I2C Interface
8.3.12
Independent Operation when the AUTO Bit is Set
8.3.13
I2C Slave Address and AUTO Bit Programming
8.4
Device Functional Modes
8.4.1
Off
8.4.2
Manual
8.4.3
Semi-Auto
8.4.4
Auto
8.4.5
Push-Button Power On Response
8.4.6
TSTART Indicators of Detect and Class Failures
8.4.7
Device Power On Initialization
8.5
Register Map – I2C-Addressable
8.5.1
Interrupt Register
8.5.2
Interrupt Enable Register
8.5.3
Power Event Register
8.5.4
Detection Event Register
8.5.5
Fault Event Register
8.5.6
Start/ILIM Event Register
8.5.7
Supply Event Register
8.5.8
Port n Status Register
8.5.8.1
Port 1 Status Register
8.5.8.2
Port 2 Status Register
8.5.8.3
Port 3 Status Register
8.5.8.4
Port 4 Status Register
8.5.9
Power Status Register
8.5.10
I2C Slave Address Register
8.5.11
Operating Mode Register
8.5.12
Disconnect Enable Register
8.5.13
Detect/Class Enable Register
8.5.14
Port Power Priority Register
8.5.15
Timing Configuration Register
8.5.16
General Mask 1 Register
8.5.17
Detect/Class Restart Register
8.5.18
Power Enable Register
8.5.19
Reset Register
8.5.20
Legacy Detect Mode Register
8.5.21
Two-Event Classification Register
8.5.22
Interrupt Timer Register
8.5.23
Disconnect Threshold Register
8.5.23.1
Bits Description
8.5.24
ICUTnm CONFIG Register
8.5.24.1
ICUT21 CONFIG Register
8.5.24.2
ICUT43 CONFIG Register
8.5.24.3
Bits Description
8.5.25
Temperature Register
8.5.26
Input Voltage Register
8.5.27
Port n Current Register
8.5.27.1
Port 1 Current Register
8.5.27.2
Port 2 Current Register
8.5.27.3
Port 3 Current Register
8.5.27.4
Port 4 Current Register
8.5.28
Port n Voltage Register
8.5.28.1
Port 1 Voltage Register
8.5.28.2
Port 2 Voltage Register
8.5.28.3
Port 3 Voltage Register
8.5.28.4
Port 4 Voltage Register
8.5.29
PoE Plus Register
8.5.30
Firmware Revision Register
8.5.31
I2C Watchdog Register
8.5.32
Device ID Register
8.5.33
Cool Down/Gate Drive Register
8.5.34
Port n Detect Resistance Register
8.5.34.1
Port 1 Detect Resistance Register
8.5.34.1.1
Port 2 Detect Resistance Register
8.5.34.1.2
Port 3 Detect Resistance Register
8.5.34.1.3
Port 4 Detect Resistance Register
8.5.35
Port n Detect Voltage Difference Register
8.5.35.1
Port 1 Detect Voltage Difference Register
8.5.35.2
Port 2 Detect Voltage Difference Register
8.5.35.3
Port 3 Detect Voltage Difference Register
8.5.35.4
Port 4 Detect Voltage Difference Register
8.5.36
Reserved Registers
9
Application and Implementation
9.1
Introduction to PoE
9.2
Application Information
9.2.1
Kelvin Current Sensing Resistor
9.2.2
Connections on Unused Ports
9.3
Typical Application
9.3.1
Two Port, Auto Mode Application with External Port Reset
9.3.1.1
Design Requirements
9.3.2
Four Port, Auto Mode Application
9.3.2.1
Design Requirements
9.3.3
Eight Port, Semi-Auto Mode Application Using MSP430 Micro-Controller
9.3.3.1
Design Requirements
9.3.4
Detailed Design Procedure
9.3.4.1
Power Pin Bypass Capacitors
9.3.4.2
Per Port Components
9.3.4.3
System Level Components (not shown in the schematic diagrams)
9.3.5
Application Curves
9.4
System Examples
9.4.1
Overcurrent and Overload Protection
9.4.2
Inrush Protection
9.4.3
ICUT Current Limit
9.4.4
Foldback Protection (ILIM)
9.4.5
Kelvin Current Sensing Resistor
10
Power Supply Recommendations
10.1
VDD
10.2
VPWR
10.3
VPWR-RESET Sequencing
11
Layout
11.1
Layout Guidelines
11.1.1
Port Current Kelvin Sensing
11.2
Layout Example
11.2.1
Component Placement and Routing Guidelines
11.2.1.1
Power Pin Bypass Capacitors
11.2.1.2
Per-Port Components
12
デバイスおよびドキュメントのサポート
12.1
ドキュメントのサポート
12.1.1
関連資料
12.2
ドキュメントの更新通知を受け取る方法
12.3
コミュニティ・リソース
12.4
商標
12.5
静電気放電に関する注意事項
12.6
Glossary
13
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
PW|28
MPDS364
サーマルパッド・メカニカル・データ
発注情報
jajsc25i_oa
jajsc25i_pm
9.3.5
Application Curves
Figure 51.
Open Circuit Detection
Figure 53.
Four Point Detection, One-event Classification (Class 0) and Power On
Figure 55.
Two-event Classification
(Class 4) and Power On
Figure 52.
Power on Sequence After PD is Connected
Figure 54.
Four Point Detection, One-event Classification (Class 3) and Power On
Figure 56.
Inrush and Load On