SLUSC25A February 2015 – August 2017 TPS2388
PRODUCTION DATA.
COMMAND = 40h with1 Data Byte Read/Write
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
PoEP4 | PoEP3 | PoEP2 | PoEP1 | – | – | – | TPON |
R/W-0 | R/W-0 | R/W-0 | R/W-0 | – | – | – | R/W-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Type | Reset | Description | ||||
---|---|---|---|---|---|---|---|---|
7–4 | PoEP4- PoEP1 | R/W | 0 | When set, this activates the PoE Plus mode for a port which increases its ILIM and ISHORT levels to around 2 ½ times their normal settings, as shown in Figure 18. Also the PoE Plus bit is used with the Police Configuration register to define ICUT threshold. See Police Configuration register for more details on the subject. Note that the fault timer starts when the ILIM or ICUT (if ICUT is enabled) threshold is exceeded. Also see the Port Power Priority/ICUT Disable register. | ||||
Notes: | ||||||||
1) | At port turn on, the inrush current profile remains the same, whatever the state of the PoEPn bit, as shown in Figure 17. | |||||||
2) | When a PoEPn bit is set, the corresponding POLn bits in Police Configuration register are initially changed to 0x0. When a PoEPn bit is reset, the corresponding POLn bits in Police Configuration register are initially changed to 0xF. In both cases, the port police current threshold is the same value. | |||||||
3) | When a PoEPn bit is deasserted, the tLIM used for the associated port is always the nominal value (~60 ms). If PoEPn bit is asserted, then tLIM for associated port is programmable as defined in the Timing Configuration register. | |||||||
4) | If a port is turned on by use of the Type 2 IEEE Power Enable Pushbutton, the PSE does the following. When power-on is complete and if class 4 has been detected, the corresponding PoEPn bit is set and the value of the corresponding Police Configuration register is set to 640 mA (08h code). This is done within 5 ms of completion of inrush. | |||||||
0 | TPON | R/W | 0 | When set, if DETn bit (DETECT/CLASS ENABLE register) is set and while in semiauto mode, writing a 1 at a PWONn bit in the Power Enable register will turn on a port after the current detection (and class is valid if enabled) cycle is completed but only if the IEEE802.3 TPON timing specification can be met. TPON specification is the time from the completion of a valid detection cycle to port turn ON. If TPON specification cannot be met, a new detection cycle is restarted, followed by a classification cycle, at the end of which the port is turned on, but only if a valid detection is returned. For this case, there is no additional attempt to turn on the port until this push button is reasserted. If TPON bit is low, writing a 1 at a PWONn bit in the Power Enable register will turn on the associated port immediately, regardless of IEEE802.3 TPON timing specification and regardless of the detection result. |