JAJSDY1C June   2017  – March 2018 TPS25740B

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
    1.     Pin Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Switching Characteristics
    8. 8.8 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
      1. 9.1.1 VBUS Capacitance
      2. 9.1.2 USB Data Communications
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  ENSRC
      2. 9.3.2  USB Type-C CC Logic (CC1, CC2)
      3. 9.3.3  USB PD BMC Transmission (CC1, CC2, VTX)
      4. 9.3.4  USB PD BMC Reception (CC1, CC2)
      5. 9.3.5  Discharging (DSCG, VPWR)
        1. 9.3.5.1 Discharging after a Fault (VPWR)
      6. 9.3.6  Configuring Voltage Capabilities (HIPWR)
      7. 9.3.7  Configuring Power Capabilities (PSEL, PCTRL, HIPWR)
      8. 9.3.8  Gate Driver (GDNG, GDNS)
      9. 9.3.9  Fault Monitoring and Protection
        1. 9.3.9.1 Over/Under Voltage (VBUS)
        2. 9.3.9.2 Over-Current Protection (ISNS, VBUS)
        3. 9.3.9.3 System Fault Input (GD, VPWR)
      10. 9.3.10 Voltage Control (CTL1, CTL2,CTL3)
      11. 9.3.11 Sink Attachment Indicator (DVDD)
      12. 9.3.12 Power Supplies (VAUX, VDD, VPWR, DVDD)
      13. 9.3.13 Grounds (AGND, GND)
      14. 9.3.14 Output Power Supply (DVDD)
    4. 9.4 Device Functional Modes
      1. 9.4.1 Sleep Mode
      2. 9.4.2 Checking VBUS at Start Up
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 System-Level ESD Protection
      2. 10.1.2 Using ENSRC to Enable the Power Supply upon Sink Attachment
      3. 10.1.3 Use of GD Internal Clamp
      4. 10.1.4 Resistor Divider on GD for Programmable Start Up
      5. 10.1.5 Selection of the CTL1, CTL2, and CTL3 Resistors (R(FBL1), R(FBL2), and R(FBL3))
      6. 10.1.6 Voltage Transition Requirements
      7. 10.1.7 VBUS Slew Control using GDNG C(SLEW)
      8. 10.1.8 Tuning OCP using RF and CF
    2. 10.2 Typical Applications
      1. 10.2.1 Typical Application, A/C Power Source (Wall Adapter)
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 Power Pin Bypass Capacitors
          2. 10.2.1.2.2 Non-Configurable Components
          3. 10.2.1.2.3 Configurable Components
        3. 10.2.1.3 Application Curves
      2. 10.2.2 Typical Application, D/C Power Source
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
          1. 10.2.2.2.1 Power Pin Bypass Capacitors
          2. 10.2.2.2.2 Non-Configurable Components
          3. 10.2.2.2.3 Configurable Components
        3. 10.2.2.3 Application Curves
    3. 10.3 System Examples
      1. 10.3.1 D/C Power Source (Power Hub)
      2. 10.3.2 A/C Power Source (Wall Adapter)
      3. 10.3.3 Dual-Port A/C Power Source (Wall Adaptor)
      4. 10.3.4 D/C Power Source (Power Hub with 3.3 V Rail)
  11. 11Power Supply Recommendations
    1. 11.1 VDD
    2. 11.2 VPWR
  12. 12Layout
    1. 12.1 Port Current Kelvin Sensing
    2. 12.2 Layout Guidelines
      1. 12.2.1 Power Pin Bypass Capacitors
      2. 12.2.2 Supporting Components
    3. 12.3 Layout Example
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 ドキュメントのサポート
    2. 13.2 ドキュメントの更新通知を受け取る方法
    3. 13.3 コミュニティ・リソース
    4. 13.4 商標
    5. 13.5 静電気放電に関する注意事項
    6. 13.6 Glossary
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7 Pin Configuration and Functions

RGE Package
24-Pin VQFN
Top View

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
VTX 1 O Bypass pin for transmit driver supply. Connect this pin to GND via the recommended ceramic capacitor.
CC1 2 I/O Multifunction configuration channel interface pin to USB Type-C. Functions include connector polarity, end-device connection detect, current capabilities, and PD communication.
CC2 3 I/O Multifunction configuration channel interface pin to USB Type-C. Functions include connector polarity, end-device connection detect, current capabilities, and PD communication.
GND 4 — Power ground is associated with power management and gate driver circuits. Connect to AGND and PAD.
HIPWR 5 I Four-state input pin used to configure the voltages and currents that will be advertised. It may be connected directly to GND or DVDD, or it may be connected to GND or DVDD via a resistance R(SEL).
CTL1 6 O Digital output pin used to control an external voltage regulator.
CTL2 7 O Digital output pin used to control an external voltage regulator.
CTL3 8 O Digital output pin used to control an external voltage regulator.
N/C 9 — Connect to GND.
N/C 10 — Connect to GND.
ENSRC 11 O Open drain output pin used to indicate when the VBUS needs to be sourced.
PSEL 12 I A four-state input used for selecting the maximum power that can be provided. It may be connected directly to GND or DVDD, or it may be connected to GND or DVDD via a resistance R(SEL)
DVDD 13 O Internally regulated 1.85 V rail for external use up to 35 mA. Connect this pin to GND via the recommended bypass capacitor.
PCTRL 14 I Input pin used to control the power that will be advertised. It may be pulled high or low dynamically.
GD 15 I Master enable for the GDNG/GDNS gate driver. The system can drive this low to force the power path switch off.
VAUX 16 O Internally regulated rail for use by the power management circuits. Connect this pin to GND via the recommended bypass capacitor.
VDD 17 I Optional input supply.
AGND 18 — Analog ground associated with monitoring and power conditioning circuits. Connect to GND and PAD.
ISNS 19 I The ISNS input is used to monitor a VBUS-referenced sense resistor for over-current events.
VPWR 20 I Connect to an external voltage as a source of bias power. If VDD is supplied, this supply is optional while DVDD is low.
VBUS 21 I The voltage monitor for the VBUS line.
GDNG 22 O High-voltage open drain gate driver which may be used to drive NMOS power switches. Connect to the gate terminal.
GDNS 23 I High-voltage open drain gate driver which may be used to drive NMOS power switches. Connect to the source terminal.
DSCG 24 O Discharge is an open-drain output that discharges the system VBUS line through an external resistor.
Thermal Pad — — Connect thermal pad to GND / AGND plane.