JAJSHY1E September 2019 – March 2022 TPS25840-Q1 , TPS25842-Q1
PRODUCTION DATA
The voltage on the EN/UVLO pin controls the ON or OFF operation of TPS2584x-Q1. An EN/UVLO pin voltage higher than VEN/UVLO-VOUT-H is required to start the internal regulator (Assume 5.1-k pull down resister on INT pin). The EN/UVLO pin is an input and can not be left open or floating. The simplest way to enable the operation of the TPS2584x-Q1 is to connect the EN to VIN. This action allows self-start-up of the TPS2584x-Q1 when VIN is within the operation range.
Many applications benefit from the employment of an enable divider RENT and RENB (Figure 10-3) to establish a precision system UVLO level for the TPS2584x-Q1. System UVLO can be used for sequencing, ensuring reliable operation, or supply protection, such as a battery discharge level. To ensure the USB port VBUS is within the 5-V operating range as required for USB compliance (for the latest USB specifications and requirements, refer to USB.org), TI suggests that the RENT and RENB resistors be chosen such that the TPS2584x-Q1 enables when VIN is approximately 6 V. Considering the drop out voltage of the buck regulator and IR loses in the system, 6 V provides adequate margin to maintain VBUS within USB specifications. If system requirements such as a warm crank (start) automotive scenario require operation with VIN < 6 V, the values of RENT and RENB can be calculated assuming a lower VIN. An external logic signal can also be used to drive EN/UVLO input when a microcontroller is present and it is desirable to enable or disable the USB port remotely for other reasons.
UVLO configuration using external resistors is governed by the following equations:
Example:
VIN(ON) = 6 V (user choice)
RENB = 5 kΩ (user choice)
RENT = [(VIN(ON) / VEN/UVLO_H) – 1] × RENB= 19.6 kΩ. Choose standard 20 kΩ.
Therefore, VIN(OFF) = 6 V × [1 – (0.09 V / 1.2 V)] = 5.55 V
A typical start-up waveform is shown in Figure 10-4. The rise time of DCDC VBUS voltage is about 5 ms.
For TPS2584x-Q1, the pin voltage must meet the requirement below during startup. See Figure 10-5.
After the 150-ms deglitch time, no additional requirement on these pins. In real application, BUCK_ST pin can be used to configure the timing sequence.