JAJSJU4D May 2020 – September 2021 TPS25850-Q1 , TPS25851-Q1 , TPS25852-Q1
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
SW (SW PIN) | ||||||
TON_MIN | Minimum turnon-time | 84 | ns | |||
TON_MAX | Maximum turnon-time, HS timeout in dropout | 6 | µs | |||
TOFF_MIN | Minimum turnoff time | 81 | ns | |||
Dmax | Maximum switch duty cycle | 98 | % | |||
TIMING RESISTOR AND INTERNAL CLOCK | ||||||
fSW_RANGE | Switching frequency range using FREQ mode | 9 kΩ ≤ RFREQ≤ 99 kΩ | 200 | 3000 | kHz | |
fSW | Switching frequency | RFREQ = 80.6 kΩ | 228 | 253 | 278 | kHz |
RFREQ = 49.9 kΩ | 360 | 400 | 440 | kHz | ||
RFREQ = 8.45 kΩ | 1980 | 2200 | 2420 | kHz | ||
FSSS | Frequency span of spread spectrum operation | ±6 | % | |||
EXTERNAL CLOCK(SYNC) | ||||||
fFREQ/SYNC | Switching frequency using external clock on FREQ/SYNC pin | 200 | 3000 | kHz | ||
TSYNC_MIN | Minimum SYNC input pulse width | fSYNC = 400kHz, VFREQ/SYNC > VIH_FREQ/SYNC, VFREQ/SYNC < VIL_FREQ/SYNC | 100 | ns | ||
TLOCK_IN | PLL lock time | 100 | µs | |||
tDEGA_CC_ATT_DETM | Attach asserting deglitch in the Detached Mode | 1.29 | 2.05 | 3.05 | ms | |
tDEGA_CC_DETACH_SINKM | Detach asserting deglitch for exiting SINK Mode | 8.2 | 12.5 | 18 | ms | |
tDEGA_CC_SHORT | Detach, Rd and Ra asserting deglitch | 92 | 192 | 339 | µs | |
tDEGA_CC_LONG | Long deglitch | 103 | 148 | 200 | ms |