JAJSRN4A July   2023  – October 2023 TPS25984

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 概要 (続き)
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Logic Interface
    7. 7.7 Timing Requirements
    8. 7.8 Switching Characteristics
    9. 7.9 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Undervoltage Protection
      2. 8.3.2  Insertion Delay
      3. 8.3.3  Overvoltage Protection
      4. 8.3.4  Inrush Current, Overcurrent, and Short-Circuit Protection
        1. 8.3.4.1 Slew Rate (dVdt) and Inrush Current Control
          1. 8.3.4.1.1 Start-Up Time Out
        2. 8.3.4.2 Steady-State Overcurrent Protection (Circuit-Breaker)
        3. 8.3.4.3 Active Current Limiting During Start-Up
        4. 8.3.4.4 Short-Circuit Protection
      5. 8.3.5  Analog Load Current Monitor (IMON)
      6. 8.3.6  Mode Selection (MODE)
      7. 8.3.7  Parallel Device Synchronization (SWEN)
      8. 8.3.8  Stacking Multiple eFuses for Unlimited Scalability
        1. 8.3.8.1 Current Balancing During Start-Up
      9. 8.3.9  Analog Junction Temperature Monitor (TEMP)
      10. 8.3.10 Overtemperature Protection
      11. 8.3.11 Fault Response and Indication (FLT)
      12. 8.3.12 Power-Good Indication (PG)
      13. 8.3.13 Output Discharge
      14. 8.3.14 FET Health Monitoring
      15. 8.3.15 Single Point Failure Mitigation
        1. 8.3.15.1 IMON Pin Single Point Failure
        2. 8.3.15.2 ILIM Pin Single Point Failure
        3. 8.3.15.3 IREF Pin Single Point Failure
        4. 8.3.15.4 ITIMER Pin Single Point Failure
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Single Device, Standalone Operation
      2. 9.1.2 Multiple Devices, Parallel Connection
      3. 9.1.3 Multiple eFuses, Parallel Connection With PMBus
      4. 9.1.4 Digital Telemetry Using External Microcontroller
    2. 9.2 Typical Application: 12-V, 3.3-kW Power Path Protection in Data Center Servers
      1. 9.2.1 Application
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
      4. 9.2.4 Application Curves
    3. 9.3 Best Design Practices
    4. 9.4 Power Supply Recommendations
      1. 9.4.1 Transient Protection
      2. 9.4.2 Output short-Circuit Measurements
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ

8.3.4.2 Steady-State Overcurrent Protection (Circuit-Breaker)

The TPS25984x responds to output overcurrent conditions during steady-state by performing a circuit-breaker action after a user-adjustable transient fault blanking interval. This action allows the device to support a higher peak current for a short user-defined interval but also ensures robust protection in case of persistent output faults.

The device constantly senses the output load current and provides an analog current output (IIMON) on the IMON pin which is proportional to the load current, which in turn produces a proportional voltage (VIMON) across the IMON pin resistor (RIMON) as per Equation 4.

Equation 4. V I M O N = I O U T × G I M O N × R I M O N

Where GIMON is the current monitor gain (IIMON : IOUT)

The overcurrent condition is detected by comparing this voltage against the voltage on the IREF pin as a reference. The reference voltage (VIREF) can be controlled in two ways, which sets the overcurrent protection threshold (IOCP) accordingly.

  • In the standalone or primary mode of operation, the internal current source interacts with the external IREF pin resistor (RIREF) to generate the reference voltage. It is also possible to drive the IREF pin from an external low impedance reference voltage source as shown in Equation 5.
    Equation 5. V I R E F = I I R E F × R I R E F
  • In a primary and secondary parallel configuration, the primary eFuse or controller drives the voltage on the IREF pin to provide an external reference (VIREF) for all the secondary devices in the chain.

The overcurrent protection threshold during steady-state (IOCP) can be calculated using Equation 6.

Equation 6. I O C P = V I R E F G I M O N × R I M O N
Note:

Maintain VIREF within the recommended voltage range to ensure proper operation of the overcurrent detection circuit.

TI recommends to add a 150-pF capacitor from IREF pin to GND for improved noise immunity.

After an overcurrent condition is detected, that is the load current exceeds the programmed current limit threshold (IOCP), but stays lower than the short-circuit threshold (2 × IOCP), the device starts discharging the ITIMER pin capacitor using an internal 2-μA pulldown current. If the load current drops below the current limit threshold before the ITIMER capacitor discharges by ΔVITIMER, the ITIMER is reset by pulling it up to VINT internally and the circuit-breaker action is not engaged. This action allows short overload transient pulses to pass through the device without tripping the circuit. If the overcurrent condition persists, the ITIMER capacitor continues to discharge and after it falls by ΔVITIMER, the circuit-breaker action turns off the FET immediately. At the same time, the ITIMER cap is charged up to VINT again so that it is at its default state before the next overcurrent event. This action ensures the full blanking timer interval is provided for every overcurrent event. Equation 24 can be used to calculate the RIMON value for the desired overcurrent threshold.

Equation 7. R I M O N = V I R E F G I M O N × I O C P

The duration for which transients are allowed can be adjusted using an appropriate capacitor value from ITIMER pin to ground. The transient overcurrent blanking interval can be calculated using Equation 8.

Equation 8. t I T I M E R m s = C I T I M E R n F × ∆ V I T I M E R V I I T I M E R μ A
Note:

  1. Leave the ITIMER pin open to allow the part to break the circuit with the minimum possible delay. However, leaving the pin open makes the circuit-breaker response extremely sensitive to noise and can cause false tripping during load transients.

  2. Shorting the ITIMER pin to ground results in minimum overcurrent response delay (similar to ITIMER pin open condition), but increases the quiescent current – not a recommended mode of operation.

  3. Increasing the ITIMER cap value extends the overcurrent blanking interval. However, it also extends the time needed for the ITIMER cap to recharge up to VINT before the next overcurrent event. If the next overcurrent event occurs before the ITIMER cap is recharged fully, it takes less time to discharge to the VITIMER threshold, thereby it provides a shorter blanking interval than intended.

Figure 8-4 illustrates the overcurrent response for TPS25984x eFuse. After the part shuts down due to a circuit-breaker fault, it either stays latched off (TPS259840 variant) or restarts automatically after a fixed delay (TPS259841 variant).

GUID-B1BC7039-2941-495D-87AE-190C7F0F0471-low.gifFigure 8-4 Steady-State Overcurrent (Circuit-Breaker) Response