SLVSHR9 December   2024 TPS25984B

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Logic Interface
    7. 6.7 Timing Requirements
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Undervoltage Protection
      2. 7.3.2  Insertion Delay
      3. 7.3.3  Overvoltage Protection
      4. 7.3.4  Inrush Current, Overcurrent, and Short-Circuit Protection
        1. 7.3.4.1 Slew Rate (dVdt) and Inrush Current Control
          1. 7.3.4.1.1 Start-Up Time Out
        2. 7.3.4.2 Steady-State Overcurrent Protection (Circuit-Breaker)
        3. 7.3.4.3 Active Current Limiting During Start-Up
        4. 7.3.4.4 Short-Circuit Protection
      5. 7.3.5  Analog Load Current Monitor (IMON)
      6. 7.3.6  Mode Selection (MODE)
      7. 7.3.7  Digital Overcurrent Indication (D_OC)
      8. 7.3.8  Stacking Multiple eFuses for Scalability
        1. 7.3.8.1 Current Balancing During Start-Up
      9. 7.3.9  Analog Junction Temperature Monitor (TEMP)
      10. 7.3.10 Overtemperature Protection
      11. 7.3.11 Fault Response and Indication (GOK/FLT)
      12. 7.3.12 Power-Good Indication (PG)
      13. 7.3.13 Output Discharge
      14. 7.3.14 FET Health Monitoring
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Single Device, Standalone Operation
      2. 8.1.2 Multiple Devices, Parallel Connection
      3. 8.1.3 Digital Telemetry Using External Microcontroller
    2. 8.2 Typical Application: 12V, 3.3kW Power Path Protection in Data Center Servers
      1. 8.2.1 Application
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
      4. 8.2.4 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Transient Protection
      2. 8.3.2 Output Short-Circuit Measurements
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.10 Overtemperature Protection

The TPS25984Bx employs an internal thermal shutdown mechanism to protect itself when the internal FET becomes too hot to operate safely. When the TPS25984B0/3 or TPS25984B2 (with MODE pin left floating) detects thermal overload, it shuts down and remains latched-off until the device is power cycled or re-enabled. When the TPS25984B1 or TPS25984B2 (with MODE pin connected to GND) detects thermal overload, it remains off until it has cooled down sufficiently. Thereafter, the device remains off for an additional delay of tRST after which it automatically retries to turn on if it is still enabled.

Table 7-1 Overtemperature Protection Summary

Device

Enter TSD

Exit TSD

TPS25984B0/3 (Latch-Off) or TPS25984B2 (with MODE pin left floating)

TJ ≥ TSD

TJ < TSD – TSDHYS

VDD cycled to 0 V and then above VUVP(R) or EN/UVLO toggled below VSD(F)

TPS25984B1 (Auto-Retry) or TPS25984B2 (with MODE pin connected to GND)

TJ ≥ TSD

TJ < TSD – TSDHYS

tRST timer expired or VDD cycled to 0 V and then above VUVP(R) or EN/UVLO toggled below VSD(F)