SLVSHR9 December   2024 TPS25984B

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Logic Interface
    7. 6.7 Timing Requirements
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Undervoltage Protection
      2. 7.3.2  Insertion Delay
      3. 7.3.3  Overvoltage Protection
      4. 7.3.4  Inrush Current, Overcurrent, and Short-Circuit Protection
        1. 7.3.4.1 Slew Rate (dVdt) and Inrush Current Control
          1. 7.3.4.1.1 Start-Up Time Out
        2. 7.3.4.2 Steady-State Overcurrent Protection (Circuit-Breaker)
        3. 7.3.4.3 Active Current Limiting During Start-Up
        4. 7.3.4.4 Short-Circuit Protection
      5. 7.3.5  Analog Load Current Monitor (IMON)
      6. 7.3.6  Mode Selection (MODE)
      7. 7.3.7  Digital Overcurrent Indication (D_OC)
      8. 7.3.8  Stacking Multiple eFuses for Scalability
        1. 7.3.8.1 Current Balancing During Start-Up
      9. 7.3.9  Analog Junction Temperature Monitor (TEMP)
      10. 7.3.10 Overtemperature Protection
      11. 7.3.11 Fault Response and Indication (GOK/FLT)
      12. 7.3.12 Power-Good Indication (PG)
      13. 7.3.13 Output Discharge
      14. 7.3.14 FET Health Monitoring
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Single Device, Standalone Operation
      2. 8.1.2 Multiple Devices, Parallel Connection
      3. 8.1.3 Digital Telemetry Using External Microcontroller
    2. 8.2 Typical Application: 12V, 3.3kW Power Path Protection in Data Center Servers
      1. 8.2.1 Application
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
      4. 8.2.4 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Transient Protection
      2. 8.3.2 Output Short-Circuit Measurements
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

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サーマルパッド・メカニカル・データ
発注情報

8.1.2 Multiple Devices, Parallel Connection

Applications which need higher current capability can use two or more TPS25984Bx devices connected in parallel as shown in Figure 8-2.

TPS25984B Devices Connected in Parallel for Higher Current CapabilityFigure 8-2 Devices Connected in Parallel for Higher Current Capability

This configuration is achieved by connecting all the devices as follows:

  1. DVDT is connected through capacitor to GND.
  2. IREF is connected through resistor to GND.
  3. IMON is connected through resistor to GND.
  4. ILIM is connected through resistor to GND.

The following pins of all devices must be connected together:

  1. IN
  2. OUT
  3. EN/UVLO
  4. DVDT
  5. D_OC
  6. IMON
  7. IREF
  8. GOK/FLT

In this configuration, all the devices are powered up and enabled simultaneously.

Inrush: During inrush, because the DVDT pins are tied together to a single DVDT capacitor all the devices turn on the output with the same slew rate (SR). Choose the common DVDT capacitor (CDVDT) as per the following Equation 14 and Equation 15.

Equation 14. SRV/ms=IINRUSHACLOADmF
Equation 15. CDVDTpF=N×kSRV/ms

Where N = number of parallel devices and k = 51300 for B0/1/3 variants, and k = 135000 for B2 variant.

In this condition, the internal balancing circuit ensures that the load current is shared among all devices during start-up. This action prevents a situation where some devices turn on faster than others and experience more thermal stress as compared to other devices. This can potentially result in premature or partial shutdown of the parallel chain, or even SOA damage to the devices. The current balancing scheme ensures the inrush capability of the chain scales according to the number of devices connected in parallel, thereby ensuring successful start-up with larger output capacitances or higher loading during start-up.

Steady-state: During steady-state, all devices share current based on the respective device RDSON and path resistance to distribute current across all the devices in the parallel chain.

Overcurrent during steady-state: The RILIM value for each individual eFuse must be selected based on the following Equation 16.

Equation 16. RILIM=N×0.75×VIREFGILIM×IOCP(TOT)

Where N = number of devices in parallel, and IOCP(TOT) = Total system circuit-breaker threshold

The reference voltage can be generated by connecting appropriate resistor RIREF on the IREF pin.

Equation 17. VIREF=N×IIREF×RIREF

Other variations:

The IREF pin can be driven from an external voltage reference (VIREF).

Severe overcurrent (short-circuit): If there is a severe fault at the output (for example, output shorted to ground with a low impedance path) during steady-state operation, the current builds up rapidly to a high value and triggers the fast-trip response in each device. The devices use two thresholds for fast-trip protection – a user-adjustable threshold (ISFT = 2 × IOCP in steady-state or ISFT = 1.5 × ILIM during inrush) as well as a fixed threshold (IFFT only during steady-state). After the fast-trip, the devices enter into a latch-off fault condition till the device is power cycled or re-enabled (for TPS25984B0/3 variants) or the auto-retry timer expires (only for TPS25984B1 variant or for TPS25984B2 variant with MODE pin connected to GND).