JAJSMF5B september   2022  – june 2023 TPS25990

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Revision History
  6. 概要 (続き)
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Logic Interface DC Characteristics
    7. 7.7  Telemetry
    8. 7.8  PMBus Interface Timing Characteristics
    9. 7.9  External EEPROM Interface Timing Characteristics
    10. 7.10 Timing Requirements
    11. 7.11 Switching Characteristics
    12. 7.12 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Undervoltage Protection
      2. 8.3.2  Insertion Delay
      3. 8.3.3  Overvoltage Protection
      4. 8.3.4  Inrush Current, Overcurrent, and Short-Circuit Protection
        1. 8.3.4.1 Slew rate (dVdt) and Inrush Current Control
          1. 8.3.4.1.1 Start-Up Timeout
        2. 8.3.4.2 Steady-State Overcurrent Protection (Circuit-Breaker)
        3. 8.3.4.3 Active Current Limiting During Start-Up
        4. 8.3.4.4 Short-Circuit Protection
      5. 8.3.5  Single Point Failure Mitigation
        1. 8.3.5.1 IMON Pin Single Point Failure
        2. 8.3.5.2 ILIM Pin Single Point Failure
        3. 8.3.5.3 IREF Pin Single Point Failure
      6. 8.3.6  Analog Load Current Monitor (IMON)
      7. 8.3.7  Overtemperature Protection
      8. 8.3.8  Analog Junction Temperature Monitor (TEMP)
      9. 8.3.9  FET Health Monitoring
      10. 8.3.10 General Purpose Digital Input/Output Pins
        1. 8.3.10.1 Fault Response and Indication (FLT)
        2. 8.3.10.2 Power Good Indication (PG)
        3. 8.3.10.3 Parallel Device Synchronization (SWEN)
      11. 8.3.11 Stacking Multiple eFuses for Unlimited Scalability
        1. 8.3.11.1 Current Balancing During Start-Up
      12. 8.3.12 General Purpose Comparators
      13. 8.3.13 Output Discharge
      14. 8.3.14 PMBus® Digital Interface
        1. 8.3.14.1  PMBus® Device Addressing
        2. 8.3.14.2  SMBus Protocol
        3. 8.3.14.3  SMBus™ Message Formats
        4. 8.3.14.4  Packet Error Checking
        5. 8.3.14.5  Group Commands
        6. 8.3.14.6  SMBus™ Alert Response Address (ARA)
        7. 8.3.14.7  PMBus® Commands
          1. 8.3.14.7.1 Detailed Descriptions of PMBus® Commands
            1. 8.3.14.7.1.1  OPERATION (01h, Read/Write Byte)
            2. 8.3.14.7.1.2  CLEAR_FAULTS (03h, Send Byte)
            3. 8.3.14.7.1.3  RESTORE_FACTORY_DEFAULTS (12h, Send Byte)
            4. 8.3.14.7.1.4  STORE_USER_ALL (15h, Send Byte)
            5. 8.3.14.7.1.5  RESTORE_USER_ALL (16h, Send Byte)
            6. 8.3.14.7.1.6  BB_ERASE (F5h, Send Byte)
            7. 8.3.14.7.1.7  FETCH_BB_EEPROM (F6h, Send Byte)
            8. 8.3.14.7.1.8  POWER_CYCLE (D9h, Send Byte)
            9. 8.3.14.7.1.9  MFR_WRITE_PROTECT (F8h, Read/Write Byte)
            10. 8.3.14.7.1.10 CAPABILITY (19h, Read Byte)
            11. 8.3.14.7.1.11 STATUS_BYTE (78h, Read Byte)
            12. 8.3.14.7.1.12 STATUS_WORD (79h, Read Word)
            13. 8.3.14.7.1.13 STATUS_OUT (7Ah, Read Byte)
            14. 8.3.14.7.1.14 STATUS_IOUT (7Bh, Read Byte)
            15. 8.3.14.7.1.15 STATUS_INPUT (7Ch, Read Byte)
            16. 8.3.14.7.1.16 STATUS_TEMP (7Dh, Read Byte)
            17. 8.3.14.7.1.17 STATUS_CML (7Eh, Read Byte)
            18. 8.3.14.7.1.18 STATUS_MFR_SPECIFIC (80h, Read Byte)
            19. 8.3.14.7.1.19 STATUS_MFR_SPECIFIC_2 (F3h, Read Word)
            20. 8.3.14.7.1.20 PMBUS_REVISION (98h, Read Byte)
            21. 8.3.14.7.1.21 MFR_ID (99h, Block Read)
            22. 8.3.14.7.1.22 MFR_MODEL (9Ah, Block Read)
            23. 8.3.14.7.1.23 MFR_REVISION (9Bh, Block Read)
            24. 8.3.14.7.1.24 READ_VIN (88h, Read Word)
            25. 8.3.14.7.1.25 READ_VOUT (8Bh, Read Word)
            26. 8.3.14.7.1.26 READ_IIN (89h, Read Word)
            27. 8.3.14.7.1.27 READ_TEMPERATURE_1 (8Dh, Read Word)
            28. 8.3.14.7.1.28 READ_VAUX (D0h, Read Word)
            29. 8.3.14.7.1.29 READ_PIN (97h, Read Word)
            30. 8.3.14.7.1.30 READ_EIN (86h, Block Read)
            31. 8.3.14.7.1.31 READ_VIN_AVG (DCh, Read Word)
            32. 8.3.14.7.1.32 READ_VIN_MIN (D1h, Read Word)
            33. 8.3.14.7.1.33 READ_VIN_PEAK (D2h, Read Word)
            34. 8.3.14.7.1.34 READ_VOUT_AVG (DDh, Read Word)
            35. 8.3.14.7.1.35 READ_VOUT_MIN (DAh, Read Word)
            36. 8.3.14.7.1.36 READ_IIN_AVG (DEh, Read Word)
            37. 8.3.14.7.1.37 READ_IIN_PEAK (D4h, Read Word)
            38. 8.3.14.7.1.38 READ_TEMP_AVG (D6h, Read Word)
            39. 8.3.14.7.1.39 READ_TEMP_PEAK (D7h, Read Word)
            40. 8.3.14.7.1.40 READ_PIN_AVG (DFh, Read Word)
            41. 8.3.14.7.1.41 READ_PIN_PEAK (D5h, Read Word)
            42. 8.3.14.7.1.42 READ_SAMPLE_BUF (D8h, Block Read)
            43. 8.3.14.7.1.43 READ_BB_RAM (FDh, Block Read)
            44. 8.3.14.7.1.44 READ_BB_EEPROM (F4h, Block Read)
            45. 8.3.14.7.1.45 BB_TIMER (FAh, Read Byte)
            46. 8.3.14.7.1.46 PMBUS_ADDR (FBh, Read/Write Byte)
            47. 8.3.14.7.1.47 VIN_UV_WARN (58h, Read/Write Word)
            48. 8.3.14.7.1.48 VIN_UV_FLT (59h, Read/Write Word)
            49. 8.3.14.7.1.49 VIN_OV_WARN (57h, Read/Write Word)
            50. 8.3.14.7.1.50 VIN_OV_FLT (55h, Read/Write Word)
            51. 8.3.14.7.1.51 VOUT_UV_WARN (43h, Read/Write Word)
            52. 8.3.14.7.1.52 VOUT_PGTH (5Fh, Read/Write Word)
            53. 8.3.14.7.1.53 OT_WARN (51h, Read/Write Word)
            54. 8.3.14.7.1.54 OT_FLT (4Fh, Read/Write Word)
            55. 8.3.14.7.1.55 PIN_OP_WARN (6Bh, Read/Write Word)
            56. 8.3.14.7.1.56 IIN_OC_WARN (5Dh, Read/Write Word)
            57. 8.3.14.7.1.57 VIREF (E0h, Read/Write Byte)
            58. 8.3.14.7.1.58 GPIO_CONFIG_12 (E1h, Read/Write Byte)
            59. 8.3.14.7.1.59 GPIO_CONFIG_34 (E2h, Read/Write Byte)
            60. 8.3.14.7.1.60 ALERT_MASK (DBh, Read/Write Word)
            61. 8.3.14.7.1.61 FAULT_MASK (E3h, Read/Write Word)
            62. 8.3.14.7.1.62 DEVICE_CONFIG (E4h, Read/Write Word)
            63. 8.3.14.7.1.63 BB_CONFIG (E5h, Read/Write Byte)
            64. 8.3.14.7.1.64 OC_TIMER (E6h, Read/Write Byte)
            65. 8.3.14.7.1.65 RETRY_CONFIG (E7h, Read/Write Byte)
            66. 8.3.14.7.1.66 ADC_CONFIG_1 (E8h, Read/Write Byte)
            67. 8.3.14.7.1.67 ADC_CONFIG_2 (E9h, Read/Write Byte)
            68. 8.3.14.7.1.68 PK_MIN_AVG (EAh, Read/Write Byte)
            69. 8.3.14.7.1.69 VCMPxREF (EBh, Read/Write Byte)
            70. 8.3.14.7.1.70 PSU_VOLTAGE (ECh, Read/Write Byte)
            71. 8.3.14.7.1.71 CABLE_DROP (EDh, Read/Write Byte)
            72. 8.3.14.7.1.72 GPDAC1 (F0h, Read/Write Byte)
            73. 8.3.14.7.1.73 GPDAC2 (F1h, Read/Write Byte)
            74. 8.3.14.7.1.74 INS_DLY (F9h, Read/Write Byte)
        8. 8.3.14.8  Analog-to-digital Converter
        9. 8.3.14.9  Digital-to-analog Converters
        10. 8.3.14.10 DIRECT format Conversion
        11. 8.3.14.11 Blackbox Fault Recording
    4. 8.4 Device Functional Modes
  10. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Single Device, Standalone Operation
      2. 9.1.2 Multiple Devices, Parallel Connection
      3. 9.1.3 Multiple Devices, Independent Operation (Multi-zone)
    2. 9.2 Typical Application: 12-V, 4-kW Power Path Protection with PMBus® Interface in Datacenter Servers
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Performance Plots
    3. 9.3 Best Design Practices
    4. 9.4 Power Supply Recommendations
      1. 9.4.1 Transient Protection
      2. 9.4.2 Output Short-Circuit Measurements
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Typical Characteristics

GUID-20230504-SS0I-LR21-7HVJ-2CTXZ2RF0MQZ-low.svgFigure 7-1 ON Resistance Across Temperature
GUID-20230504-SS0I-N6CM-6GDP-KJX1NHCKF0RS-low.svgFigure 7-3 VIN Undervoltage Thresholds Across Temperature
GUID-20230504-SS0I-XLPK-GW3S-PMMNTLZV5CZR-low.svgFigure 7-5 VIN Undervoltage Thresholds Across Temperature (VIN_UV_FLT = 0x8D)
GUID-20230504-SS0I-X3TG-GQ28-7PCT08BD0QBB-low.svgFigure 7-7 VIN Overvoltage Protection Threshold Across Temperature (VIN_OV_FLT = 0x01)
GUID-20230504-SS0I-XGW5-35BJ-9BSMV82JGCZB-low.svgFigure 7-9 EN/UVLO Based Turn-off Thresholds Across Temperature
GUID-20230504-SS0I-WHK9-FXZF-STZTBPTNJ1Z1-low.svgFigure 7-11 IMON Gain Across Load and Temperature
GUID-20230504-SS0I-BXGH-5R9S-QKDG7T118FWD-low.svgFigure 7-13 VIREF DAC Transfer Function
GUID-20230504-SS0I-G4JK-KDRP-7MB8SVTD4BFD-low.svgFigure 7-15 ILIM Gain Across Load and Temperature
GUID-20230504-SS0I-69MC-VM0B-MNQZPFFG1DPH-low.svgFigure 7-17 Scalable Fast-trip Threshold Ratio Across Temperature (Steady-state)
GUID-20230504-SS0I-MHBF-NGTQ-K0SQJL9DCCFR-low.svgFigure 7-19 Fixed Fast-trip Threshold Across Temperature
GUID-20230504-SS0I-NM7X-7QT0-QFMSW9GZM3ML-low.svgFigure 7-21 Backup Overcurrent Protection Threshold (Steady-state) Accuracy
GUID-20230504-SS0I-VGSK-GTWP-NSB3GXWVNPDQ-low.svgFigure 7-23 DVDT Gain Across Temperature
GUID-20230504-SS0I-BSMB-KGXR-T4ZP3B4FXRCH-low.svgFigure 7-25 ADC Histogram (Mid-scale Analog Input)
GUID-20230504-SS0I-KQG9-4XC4-SRWBDRQVG2BZ-low.svgFigure 7-27 General Purpose DAC2 Transfer Function
GUID-20230504-SS0I-QDCH-TTW4-FTVJ0DHLZHBX-low.svgFigure 7-29 SWEN/General Purpose Input Pin Logic Thresholds Across Temperature
GUID-20230504-SS0I-5HNB-JZ0H-WMK2RGRZ0MZ4-low.svgFigure 7-31 QOD Sink Current Across Temperature
GUID-20230524-SS0I-NHBT-MKKZ-6R6VDSNZXQ78-low.svgFigure 7-33 Junction Temperature vs Load Current (With Air-Flow)
GUID-20230526-SS0I-HRFM-HNJH-5KW7LHTVHGPJ-low.svg
IN hot-plugged to 12 V supply. COUT = 18 mF, CdVdt = 33 nF, Insertion Delay programmed to 25 ms (INS_DLY = 0x01)
Figure 7-35 Input Hot Plug
GUID-20230526-SS0I-KRVX-C2FQ-5MXMTPPG7WCZ-low.svg
IN supply held steady at 12 V, EN pin held high, PMBus OPERATION OFF Command. COUT = 18 mF, CdVdt = 33 nF
Figure 7-37 Power Down Using PMBus Command
GUID-20230526-SS0I-GGNB-ZBQJ-NTKTM1RD4C9G-low.svg
IN supply held steady at 12 V, EN pin held high, PMBus POWER_CYCLE Command. COUT = 18 mF, CdVdt = 33 nF, Default delay setting (RETRY_CONFIG[2:0] = 000b)
Figure 7-39 Power Cycle Using PMBus Command
GUID-20230526-SS0I-RNVZ-MXVF-CDMKMD0CVVHK-low.svg
IN supply held steady at 12 V, EN pin toggled from high to low. COUT = 18 mF, CdVdt = 33 nF, ILOAD = 50 A
Figure 7-41 Power Down Using EN
GUID-20230526-SS0I-CVM3-C2HR-NPGXRXN5FQ3G-low.svg
IN supply held steady at 12 V, EN pin pulled down to 1 V for > 5 ms. COUT = 18 mF, CdVdt = 33 nF, ILOAD = 0 A
Figure 7-43 Power Down Using EN With Output Discharge
GUID-20230526-SS0I-RR5V-TWTQ-QDJFMHRHVJJT-low.svg
VIN Overvoltage rising threshold programmed to 13.78 V (VIN_OV_FLT = 0x0B), EN held high, IN supply ramped up from 12 V to 15 V and then ramped down again to 12 V. COUT = 18 mF, CdVdt = 33 nF
Figure 7-45 Input Overvoltage Protection
GUID-20230526-SS0I-WLRP-VRKW-QNJFJ9D3KPX4-low.svg
IN supply held steady at 12 V, EN toggled from low to high. COUT = 18 mF, CdVdt = 33 nF, DVDT scaling at 100 % (default, DEVICE_CONFIG[10:9] = 10b)
Figure 7-47 Inrush Current Control
GUID-20230526-SS0I-ZQPH-RJLF-MKQQJ23MD7MZ-low.svg
IN supply held steady at 12 V, EN toggled from low to high. COUT = 18 mF, CdVdt = 33 nF, Default PG delay setting (DEVICE_CONFIG[15] = 0b)
Figure 7-49 Power Good Assertion
GUID-20230526-SS0I-6DX7-HF1Q-KW4NJ9SG8WFC-low.svg
Device in steady-state, Load current ramped up from 50 A to 70 A for 10 ms and then ramped down to 50 A. OCP threshold set to 55 A, Overcurrent blanking delay set to 15 ms (OC_TIMER = 0x89)
Figure 7-51 Transient Overcurrent Blanking
GUID-20230526-SS0I-JWL4-GHRF-8BRWHRNR1VFS-low.svg
Device in steady-state, Load current ramped up from 50 A to 70 A for > 15 ms. OCP threshold set to 55 A, Overcurrent blanking delay set to 15 ms (OC_TIMER = 0x89), Latch-off configuration (Default, RETRY_CONFIG[5:3] = 000b)
Figure 7-53 Fault Response - Latch-off
GUID-20230526-SS0I-VFPL-TN9D-BWTDG4VRBF6M-low.svg
Device in steady-state, Load current ramped up from 50 A to 70 A for 100 ms and then ramped down to 0 A. OCP threshold set to 55 A, Overcurrent blanking delay set to 15 ms (OC_TIMER = 0x89), Auto-retry 4 times configuration (RETRY_CONFIG[5:3] = 010b), Auto-retry delay set to 55 ms (RETRY_CONFIG[2:0] = 000b)
Figure 7-55 Fault Response Followed By Recovery With Auto-retry
GUID-20230526-SS0I-RCBD-MZBG-MDZG3ZBJ4JGN-low.svg
Device in steady-state, OUT shorted to GND. OCP threshold set to 55 A, Short-circuit fast recovery disabled (Default, DEVICE_CONFIG[13] = 0b)
Figure 7-57 Short-Circuit Protection During Steady-state
GUID-20230526-SS0I-SWNK-JTKM-JJFN0LLJ0J5J-low.svg
Device in steady-state, OUT shorted to GND. OCP threshold set to 55 A, Short-circuit fast recovery enabled (Default, DEVICE_CONFIG[13] = 1b)
Figure 7-59 Short-Circuit Protection During Steady-state With Fast Recovery Enabled
GUID-20220916-SS0I-NPQX-P6LF-CB3CH8JDTF5L-low.svgFigure 7-2 VDD Undervoltage Thresholds Across Temperature
GUID-20230504-SS0I-BTJ2-WMJC-QLRJV5VJG81P-low.svgFigure 7-4 VIN Undervoltage Thresholds Across Temperature (VIN_UV_FLT = 0x38)
GUID-20230504-SS0I-PTRH-KN9K-C5ZMSH4FSWNP-low.svgFigure 7-6 VIN Overvoltage Protection Threshold Across Temperature (VIN_OV_FLT = 0x0E (Default))
GUID-20230504-SS0I-8DJD-7P9Z-VTXQC6W7C7F9-low.svgFigure 7-8 VIN Overvoltage Protection Threshold Across Temperature (VIN_OV_FLT = 0x0B)
GUID-20230504-SS0I-5GDF-FL4P-CNWMQ86QCDDM-low.svgFigure 7-10 EN/UVLO Based Shutdown Thresholds Across Temperature
GUID-20230504-SS0I-VRCL-CVZQ-XXNFRZXZXQPV-low.svgFigure 7-12 IMON Gain Accuracy Across Process, Voltage and Temperature Corners
GUID-20230505-SS0I-TTCW-VS2P-BCWCK0BTWVPD-low.svgFigure 7-14 Steady-state Overcurrent Protection Threshold (Circuit-Breaker) Accuracy
GUID-20230505-SS0I-F82R-N5BV-HVFHVWLM4WXC-low.svgFigure 7-16 Startup Overcurrent Protection Threshold (Current Limit) Accuracy
GUID-20230504-SS0I-PFLB-3WFL-RP99NCDGBR3W-low.svgFigure 7-18 Scalable Fast-trip Threshold Ratio Across Temperature (Startup)
GUID-20230504-SS0I-GT8N-4P4G-BPZKCMHNXKWH-low.svgFigure 7-20 Backup Overcurrent Protection Threshold (Startup) Accuracy
GUID-20230504-SS0I-RGNQ-PJ6S-FDRWCGMXFMXS-low.svgFigure 7-22 DVDT Pin Charging Current Across Temperature
GUID-20230504-SS0I-73MS-T4J8-TJXWLLQSWFKZ-low.svg
ADC high performance mode (DEVICE_CONFIG[3] = 1)
Figure 7-24 ADC INL
GUID-20230504-SS0I-MBNB-SVXP-P75CMLK7TWNK-low.svgFigure 7-26 General Purpose DAC1 Transfer Function
GUID-20230504-SS0I-R4ZG-HLFK-VFLVLNQRNDQF-low.svgFigure 7-28 General Purpose Comparators Reference DAC Transfer Function
GUID-20230504-SS0I-XFT0-FL4R-XND5GCLZ7Q3N-low.svgFigure 7-30 PGOOD/FLT/General Purpose Output Pin Logic Level Across Temperature
GUID-20230504-SS0I-6NQ1-KC8F-BF7C9VXWMRJ5-low.svgFigure 7-32 Junction Temperature vs Load Current (No Air-Flow)
GUID-20230526-SS0I-TB9F-2NWD-Z9GBDDL2841X-low.svg
EN held high, IN supply ramped up to 12 V. COUT = 18 mF, CdVdt = 33 nF
Figure 7-34 Power Up Using Supply
GUID-20230526-SS0I-WM0Q-QPKH-C7PW4XK1XK3B-low.svg
IN hot-plugged to 12 V supply. COUT = 18 mF, CdVdt = 33 nF, Insertion Delay programmed to 560 ms (INS_DLY = 0x07)
Figure 7-36 Input Hot Plug
GUID-20230526-SS0I-PNLZ-P0C5-T48XR7B7V4WH-low.svg
IN supply held steady at 12 V, EN pin held high, PMBus OPERATION ON Command. COUT = 18 mF, CdVdt = 33 nF
Figure 7-38 Power Up Using PMBus Command
GUID-20230526-SS0I-8SVF-FHJN-LTFQ3J5PTTX4-low.svg
IN supply held steady at 12 V, EN pin toggled from low to high. COUT = 18 mF, CdVdt = 33 nF
Figure 7-40 Power Up Using EN
GUID-20230526-SS0I-ZBNR-ZMBP-DPGSB75XNK9Z-low.svg
IN supply held steady at 12 V, EN pin toggled from high to low. COUT = 18 mF, CdVdt = 33 nF, ILOAD = 0 A
Figure 7-42 Power Down Using EN Without Output Discharge
GUID-20230526-SS0I-09RB-MBMW-8LQ82XPZGXSX-low.svg
VIN Undervoltage falling threshold programmed to 10.8 V (VIN_UV_FLT = 0x8D), EN held high, IN supply ramped down from 12 V to 10.5 V and then ramped up again to 12 V. COUT = 18 mF, CdVdt = 33 nF
Figure 7-44 Input Undervoltage Protection
GUID-20230526-SS0I-DF9P-LD2W-DRV7ZCDMQ4PV-low.svg
VIN Overvoltage rising threshold programmed to 13.78 V (VIN_OV_FLT = 0x0B), EN held high, IN supply ramped up from 12 V to 15 V and then ramped down again to 12 V. COUT = 18 mF, CdVdt = 33 nF
Figure 7-46 Input Overvoltage Protection
GUID-20230526-SS0I-V4NX-DHKT-GMS63TQW9WNM-low.svg
IN supply held steady at 12 V, EN toggled from low to high. COUT = 18 mF, CdVdt = 33 nF, DVDT scaling at 50 % (DEVICE_CONFIG[10:9] = 00b)
Figure 7-48 Inrush Current Control
GUID-20230526-SS0I-94KT-KMBS-B8LFH9KRHDH8-low.svg
IN supply held steady at 12 V, EN toggled from low to high. COUT = 18 mF, CdVdt = 33 nF, Higher PG delay setting (DEVICE_CONFIG[15] = 1b)
Figure 7-50 Power Good Assertion
GUID-20230526-SS0I-CN6M-5PKQ-NZB30WTR6D3Q-low.svg
Device in steady-state, Load current ramped up from 50 A to 70 A for > 15 ms. OCP threshold set to 55 A, Overcurrent blanking delay set to 15 ms (OC_TIMER = 0x89)
Figure 7-52 Overcurrent Protection
GUID-20230526-SS0I-95VL-06QB-LKC8RQF1R977-low.svg
Device in steady-state, Load current ramped up from 50 A to 70 A for 100 ms. OCP threshold set to 55 A, Overcurrent blanking delay set to 15 ms (OC_TIMER = 0x89), Auto-retry 1 times configuration (RETRY_CONFIG[5:3] = 001b), Auto-retry delay set to 55 ms (RETRY_CONFIG[2:0] = 000b)
Figure 7-54 Fault Response - Auto-retry
GUID-20230526-SS0I-HCZX-GZ4K-KM1CJPXVPMNW-low.svg
OUT shorted to GND. IN supply held steady at 12 V, EN pin toggled from low to high.
Figure 7-56 Power Up into Short-Circuit Protection
GUID-20230526-SS0I-BCFV-CRJG-QGHJC4MV6BFV-low.svg
Device in steady-state, OUT shorted to GND. OCP threshold set to 55 A, Short-circuit fast recovery disabled (Default, DEVICE_CONFIG[13] = 0b)
Figure 7-58 Short-Circuit Protection During Steady-state
GUID-20220919-SS0I-G6K5-90PR-KKSJCWHP9NLJ-low.gif
Sudden step in input supply voltage during steady-state causes output current spike without triggering a false fast-trip.
Figure 7-60 Input Line Transient Response