JAJSMF5B september 2022 – june 2023 TPS25990
PRODUCTION DATA
GPDAC2 is a manufacturer-specific command that allows configuring or reading a 6-bit data driving a general purpose DAC to generate a constant voltage output on the IREF/DAC2 pin. This command uses the PMBus® DIRECT format. When reading and writing to this register, use the coefficients shown in Table 8-67, Equation 19, and Equation 20.
This command uses the PMBus® read or write byte protocol. The details of this register are shown in Table 9-69.
| Bit | Name | Description | Minimum Value | Maximum Value | Default Value | Access |
|---|---|---|---|---|---|---|
7:0 | GPDAC2 | General purpose DAC output-2 | 0x00h (0.3 V) | 0x3Fh (1.186 V) | 0x00h (0.3 V) | Read/Write |
A write command to this register should be preceded by the MFR_WRITE_PROTECT command to unlock the device first to prevent accidental accidental/spurious writes.
The GPDAC2 output is multiplexed with the VIREF DAC output and either one of them can be brought out to the IREF/DAC2 pin at a time depending on DEVICE_CONFIG[6] bit setting.
If the GPDAC2 output is brought out to the IREF/DAC2 pin, the VIREF DAC voltage is still connected internally to the overcurrent & short-circuit protections and active current sharing blocks. This ensures the protection thresholds are determined by the VIREF DAC setting and not by the voltage on the IREF/DAC2pin.
When using a TPS25990 eFuse with one or more TPS25985 eFuse(s) in parallel, the VIREF output must be brought out on the IREF/DAC2 pin. The DEVICE_CONFIG[6] setting to bring the GPDAC2 output on the pin must not be used in this configuration. This is to ensure the VIREF setting controls the reference for overcurrent & short-circuit protections and active current sharing for all the devices in the parallel chain.