JAJSF90F October   2017  – December 2021 TPS2662

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Undervoltage Lockout (UVLO)
      2. 9.3.2 Overvoltage Protection (OVP)
      3. 9.3.3 Hot Plug-In and Inrush Current Control
      4. 9.3.4 Reverse Polarity Protection
        1. 9.3.4.1 Input Side Reverse Polarity Protection
        2. 9.3.4.2 Output Side Reverse Polarity Protection
      5. 9.3.5 Overload and Short-Circuit Protection
        1. 9.3.5.1 Overload Protection
        2.       28
        3. 9.3.5.2 Short-Circuit Protection
          1. 9.3.5.2.1 Start-Up With Short-Circuit On Output
      6. 9.3.6 Reverse Current Protection
      7. 9.3.7 FAULT Response
      8. 9.3.8 IN, OUT, RTN, and GND Pins
      9. 9.3.9 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Low Current Shutdown Control (SHDN)
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Step-by-Step Design Procedure
        2. 10.2.2.2 Programming the Current Limit Threshold R(ILIM) Selection
        3. 10.2.2.3 Undervoltage Lockout and Overvoltage Set Point
        4. 10.2.2.4 Setting Output Voltage Ramp Time—(tdVdT)
          1. 10.2.2.4.1 Case 1: Start-Up Without Load—Only Output Capacitance C(OUT) Draws Current During Start-Up
          2. 10.2.2.4.2 Case 2: Start-Up With Load —Output Capacitance C(OUT) and Load Draws Current During Start-Up
          3. 10.2.2.4.3 Support Component Selections – R FLT and C(IN)
      3. 10.2.3 Application Curves
    3. 10.3 System Examples
      1. 10.3.1 Field Supply Protection in PLC, DCS I/O Modules
      2. 10.3.2 Simple 24-V Power Supply Path Protection
      3. 10.3.3 Power Stealing in Smart Thermostat
    4. 10.4 Do's and Don'ts
  11. 11Power Supply Recommendations
    1. 11.1 Transient Protection
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 サポート・リソース
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.3.3 Hot Plug-In and Inrush Current Control

The devices are designed to control the inrush current upon insertion of a card into a live backplane or other hotpower source. This design limits the voltage sag on the backplane’s supply voltage and prevents unintended resets of the system power. The controlled start-up also helps to eliminate conductive and radiative interferences. An external capacitor connected from the dVdT pin to RTN defines the slew rate of the output voltage at power-on as shown in Figure 9-2 and Figure 9-3.

GUID-F5E4744F-C0F8-4DCF-9D20-6991FE958F00-low.gifFigure 9-2 Output Ramp Up Time tdVdT is Set by C(dVdT)

The dVdT pin can be left floating to obtain a predetermined slew rate (tdVdT) on the output. When the terminal is left floating, the devices set an internal output voltage ramp rate of 24 V/660 µs. A capacitor can be connected from dVdT pin to RTN to program the output voltage slew rate slower than 24 V/660 µs. Use Equation 1 and Equation 2 to calculate the external C(dVdT) capacitance.

Equation 1 governs slew rate at start-up.

Equation 1. GUID-36857E5A-7DCE-4AF8-8512-6029D267E21D-low.gif

where

  • I(dVdT) = 1.98 µA (typical)
  • GUID-DED97EAE-DD0C-4A9D-9B6B-EE53CEAF8FBB-low.gif = Desired output slew rate
  • Gain(dVdT) = dVdT to VOUT gain = 24.6

The total ramp time (tdVdT) of V(OUT) for 0 to V(IN) can be calculated using Equation 2.

Equation 2. tdVdT = 20.5 × 103 × V(IN) × C(dVdT)
GUID-943338E0-7934-48D3-8ABE-F4E821EE0E5D-low.gif
CdVdT = 22 nF COUT = 22 µF RILIM = 7.5 kΩ
Figure 9-3 Hot Plug-In and Inrush Current Control at 24-V Input