JAJSJV7C december   2020  – may 2023 TPS272C45

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
    1. 6.1 Recommended Connections for Unused Pins
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 SNS Timing Characteristics
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  9. 8 Parameter Measurement Information
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Programmable Current Limit
        1. 9.3.1.1 Inrush Current Handling
        2. 9.3.1.2 Calculating RILIMx
        3. 9.3.1.3 Configuring ILIMx From an MCU
      2. 9.3.2 Low Power Dissipation
      3. 9.3.3 Protection Mechanisms
        1. 9.3.3.1 Short-Circuit Protection
          1. 9.3.3.1.1 VS During Short-to-Ground
        2. 9.3.3.2 Inductive Load Demagnetization
        3. 9.3.3.3 Thermal Shutdown
        4. 9.3.3.4 Undervoltage Lockout on VS (UVLO)
        5. 9.3.3.5 Undervoltage Lockout on Low Voltage Supply (VDD_UVLO)
        6. 9.3.3.6 Power-Up and Power-Down Behavior
        7. 9.3.3.7 Overvoltage Protection (OVPR)
      4. 9.3.4 Diagnostic Mechanisms
        1. 9.3.4.1 Current Sense
          1. 9.3.4.1.1 RSNS Value
            1. 9.3.4.1.1.1 Current Sense Output Filter
        2. 9.3.4.2 Fault Indication
          1. 9.3.4.2.1 Fault Event Diagrams
        3. 9.3.4.3 Short-to-Supply or Open-Load Detection
          1. 9.3.4.3.1 Detection With Switch Enabled
          2. 9.3.4.3.2 Detection With Switch Disabled
        4. 9.3.4.4 Current Sense Resistor Sharing
    4. 9.4 Device Functional Modes
      1. 9.4.1 Off
      2. 9.4.2 Diagnostic
      3. 9.4.3 Active
      4. 9.4.4 Fault
  11. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 IEC 61000-4-5 Surge
      2. 10.1.2 Inverse Current
      3. 10.1.3 Loss of GND
      4. 10.1.4 Paralleling Channels
      5. 10.1.5 Thermal Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 RILIM Calculation
        2. 10.2.2.2 Diagnostics
          1. 10.2.2.2.1 Selecting the RISNS Value
      3. 10.2.3 Application Curves
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.3.2 Low Power Dissipation

There are two primary sources of power dissipation in the TPS272C45:

  1. Resistive losses in the primary FET, which are calculated as (ILOAD)2 × RON
  2. Controller losses due to quiescent operating current, which are calculated as IQ × VSUPPLY

If ILOAD is significantly more than 1 A, the resistive losses dominates the controller losses and they can be ignored. However, if ILOAD is less than 1 A, the controller losses comprise a significant portion of the total device power dissipation. To lower the controller losses, version A of the TPS272C45 introduces a secondary low voltage supply on pin VDD that can power much of the device functionality. By lowering the controller supply voltage from 24 V to 3.3 V, the total controller losses decrease significantly. Table 9-3 shows the impact this second supply can make on the total device power dissipation calculated at a worst case supply voltage of 30 V, without diagnostics enabled. There is an additional contribution to power dissipation from the current sense circuitry as well as the sensed current out of the SNS pin when diagnostics are enabled. Savings of over 80 mW per channel in the IC is achieved by powering the device with a separate 3.3-V supply.

Table 9-3 Power Dissipation Calculations
ILOADVersionResistive Losses (Maximum, 125°C)Controller Losses (Maximum, 125°C)Total PDISS (Maximum, 125°C)
500 mA (both channels)B39 mW211 mW250 mW
A39 mW50 mW89 mW
2 A (both channels)B624 mW211 mW735 mW
A624 mW50 mW674 mW

By using version TPS272C45A and providing a 3.3-V supply to the VDD pin, for a 500-mA output module the worst case device total heating is cut from 250 mW to 89 mW, about a 30% decrease in per channel power dissipation. This lower power dissipation, in addition to the small size of the TPS272C45, enables modules that have many low current outputs to shrink the size of their casings without limiting output power distribution capability. To minimize power dissipation, the VDD supply must be powered by a small DC/DC providing the less than 5 mA per device. Multiple devices can use one DC/DC converter to limit system costs, as shown in Figure 9-6.

GUID-20211123-SS0I-ZH60-RTJR-ZB6XJM1QTGD8-low.svgFigure 9-6 Secondary Low Voltage Supply Schematic

For higher current modules, the resistive losses dominate the total power dissipation and the impact of the secondary supply is less valuable. For example, Table 9-3 shows that for a 2-A output, providing the secondary supply lowers the total device dissipation by only 12%. In this case, to lower total system costs, versions with an internal regulator that need only single supply input can be used. If using versions C or D and the secondary supply is not useful or available, the VDD pin can be grounded and all current is drawn from the primary supply with no loss of functionality, but higher power dissipation.