JAJSN42D December 2011 – December 2021 TPS28225-Q1
PRODUCTION DATA
The output active low circuit effectively keeps the gate outputs low even if the driver is not powered up. This prevents open gate conditions on the external power FETs and accidental turn ON when the main power stage supply voltage is applied before the driver is powered up. For the simplicity, the output active low circuit is shown in the Section 7.2 as the resistor connected between LGATE and GND pins with another one connected between UGATE and PHASE pins.